
-----Original Message----- From: Z.q. Hou Sent: Monday, April 8, 2019 3:45 PM To: u-boot@lists.denx.de; albert.u.boot@aribaud.net; Priyanka Jain priyanka.jain@nxp.com; York Sun york.sun@nxp.com; sriram.dash@nxp.com; yamada.masahiro@socionext.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Mingkai Hu mingkai.hu@nxp.com; M.h. Lian minghuan.lian@nxp.com; bmeng.cn@gmail.com Cc: Z.q. Hou zhiqiang.hou@nxp.com Subject: [PATCHv5 0/8] pci: Add PCIe Gen4 controller driver for NXP Layerscape SoCs
From: Hou Zhiqiang Zhiqiang.Hou@nxp.com
Add PCIe Gen4 driver for the NXP Layerscape series SoCs. Splited the patches of adding MRRS and MPS accessors from this thread.
Hou Zhiqiang (8): armv8: layerscape: use PCIe address macro to precompile PCIe MMU entry armv8: fsl-layerscpae: correct the PCIe controllers' region size armv8: lx2160a: add MMU table entries for PCIe pci: Add PCIe Gen4 controller driver for NXP Layerscape SoCs kconfig: add dependency PCIE_LAYERSCAPE_GEN4 for FSL_PCIE_COMPAT pci: ls_pcie_g4: add device tree fixups for PCI Stream IDs armv8: lx2160a: add PCIe controller DT nodes armv8: lx2160a: enable PCIe support
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 2 +- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 16 +- arch/arm/dts/fsl-lx2160a.dtsi | 85 +++ .../arm/include/asm/arch-fsl-layerscape/cpu.h | 9 + .../asm/arch-fsl-layerscape/immap_lsch3.h | 14 +- configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 5 + configs/lx2160aqds_tfa_defconfig | 6 + configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 7 +- configs/lx2160ardb_tfa_defconfig | 6 + drivers/pci/Kconfig | 8 + drivers/pci/Makefile | 2 + drivers/pci/pcie_layerscape_gen4.c | 572 ++++++++++++++++++ drivers/pci/pcie_layerscape_gen4.h | 264 ++++++++ drivers/pci/pcie_layerscape_gen4_fixup.c | 249 ++++++++ 14 files changed, 1241 insertions(+), 4 deletions(-) create mode 100644 drivers/pci/pcie_layerscape_gen4.c create mode 100644 drivers/pci/pcie_layerscape_gen4.h create mode 100644 drivers/pci/pcie_layerscape_gen4_fixup.c
use PCIe address macro for precompile PCIe MMU entry --> modified patch put all CONFIG_SYS_PCIE4_PHYS_ADDR reference to #ifdef CONFIG_SYS_PCIE4_PHYS_ADDR.
This patch-series has been applied to fsl-qoriq master, awaiting upstream
--pk