Im using MPC8360E and NAND512W32BN6E, and they are connected like in mpc8360e-rdk (same pins).
About the waveform, i did the tests considering "reading the electronic signature" from the nand flash. I put the code below in a loop (nand_base.c):
--- /* Select the device */ this->select_chip(mtd, 0);
/* Send the command for reading device ID */ this->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
/* Read manufacturer and device IDs */ nand_maf_id = this->read_byte(mtd); nand_dev_id = this->read_byte(mtd); ---
From nand datasheet, figure 28, when CL goes from LOW to HIGH, #W goes
from HIGH to LOW, and in I/O the value for reading the electronic signature is passed.
But here with my board, CL is already in HIGH and then goes LOW.
As im using u-boot-1.1.4, i tried import the code from u-boot-1.3.3 and u-boot-1.3.4-rc1. Both i got the same result.
So, as my board is _based_ in mpc8360e-rdk, i was wondering if other configuration can affect the UPM.
Looking at the this->cmdfunc(...) (fun_cmdfunc at fsl_upm.c) it has some calls to fsl_upm_start_pattern, fsl_upm_run_pattern... and this functions activates the UPM. So it seems to be simple:
command(READID)
upm_start_pattern() upm_run_pattern(READID) upm_end_pattern()
read_byte()
Im really curious to know what is causing the CL inversion.
Right now im trying to understand the UPM array. But its not so simple.
I have my doubts if my problem is the UPM array, since its working on mpc8360e-rdk and the same array is in App Note from Freescale.
Cheers,
-- Alemao
On Fri, Jul 25, 2008 at 2:33 PM, Anton Vorontsov avorontsov@ru.mvista.com wrote:
On Fri, Jul 25, 2008 at 01:50:41PM -0300, Alemao wrote:
Hi all,
I have a board based on the MPC8360E-RDK, and im trying to make NAND at local bus works with UPM. I put the scope to see what was going wrong and I got this:
___
- the waveform in LGPL1/3 (nand CLE/ALE) should be ___| |___ ___ ___ but was |__|
The ascii art attempt failed. ;-)
[...]
One detail, im using u-boot-1.1.4 and i got the codes for UPM and NAND from u-boot-1.3.4-rc1.
Since the boards are pretty the same, I guess you can just compile the u-boot-1.3.3 (please try release instead of -rc, to be sure), and see if NAND will work. Maybe it will need really small code modifications for your board though.
Otherwise it is hard to say where is problem is (maybe the problem in the 1.1.4 nand core code, not in UPM setup?).
Also, you didn't mention what kind of chip the board is using.
Thanks,
-- Anton Vorontsov email: cbouatmailru@gmail.com irc://irc.freenode.net/bd2