16 Oct
2023
16 Oct
'23
2:59 p.m.
On 10/16/23 11:25, Paul Barker wrote:
On the Renesas RZ/G2L SoC family, we must ensure that the required clock signals are enabled and the reset signal is de-asserted before we try to communicate with the SDHI module.
Signed-off-by: Paul Barker paul.barker.ct@bp.renesas.com Reviewed-by: Biju Das biju.das.jz@bp.renesas.com Reviewed-by: Lad Prabhakar prabhakar.mahadev-lad.rj@bp.renesas.com
Reviewed-by: Marek Vasut marek.vasut+renesas@mailbox.org