From: Wojciech Tatarski wtatarski@antmicro.com
Immediate_data is 8 bit value in generic FIFO command. When fields data_xfer=1 and exponent=0 this field specifies the absolute number of data bytes to read into the RXFIFO. Values from range 0xfd to 0xff are rounded up to 0x100. It causes overwriting the next bit field which is data_xfer. According to Zynq Ultrascale TRM only DMA transfers should be word aligned. So there is no reason to round up the immediate_data field.
Signed-off-by: Wojciech Tatarski wtatarski@antmicro.com Signed-off-by: Tomasz Gorochowik tgorochowik@antmicro.com Tested-by: Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@xilinx.com ---
drivers/spi/zynqmp_gqspi.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c index efcbd0557f..3e0dbb2c7b 100644 --- a/drivers/spi/zynqmp_gqspi.c +++ b/drivers/spi/zynqmp_gqspi.c @@ -524,7 +524,7 @@ static int zynqmp_qspi_start_dma(struct zynqmp_qspi_priv *priv, u32 gen_fifo_cmd, u32 *buf) { u32 addr; - u32 size, len; + u32 size; u32 actuallen = priv->len; int ret = 0; struct zynqmp_qspi_dma_regs *dma_regs = priv->dma_regs; @@ -537,12 +537,7 @@ static int zynqmp_qspi_start_dma(struct zynqmp_qspi_priv *priv, flush_dcache_range(addr, addr + size);
while (priv->len) { - len = zynqmp_qspi_calc_exp(priv, &gen_fifo_cmd); - if (!(gen_fifo_cmd & GQSPI_GFIFO_EXP_MASK) && - (len % ARCH_DMA_MINALIGN)) { - gen_fifo_cmd &= ~GENMASK(7, 0); - gen_fifo_cmd |= roundup(len, ARCH_DMA_MINALIGN); - } + zynqmp_qspi_calc_exp(priv, &gen_fifo_cmd); zynqmp_qspi_fill_gen_fifo(priv, gen_fifo_cmd);
debug("GFIFO_CMD_RX:0x%x\n", gen_fifo_cmd); -- 2.17.1
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