On Wed, Mar 24, 2010 at 4:10 PM, Wolfgang Denk wd@denx.de wrote:
Dear Mike,
In message OF532F17EB.D2119CC3-ON852576F0.0072502F-852576F0.00725A73@apcc.com you wrote:
What is the purpose of CONFIG_PCI_BOOTDELAY? I am using uboot version
Adding a delay so the PCI controllers can come up and stabilize.
Specifically in my case, all the resets on my board have occurred well before (500 msec) this portion of the code would execute, so it would seem safe to say that any peripherals like PCI controllers would be satisfied reset-wise.
500ms is not safe. We have seen cases (for example on 440SP / 440SPe) where 5...10 seconds (!) were needed.
I've seen this as well, so I agree that 500ms seems reasonable for a general value. Per the PCI 2.3 spec, the time is supposed to be min. 100mS.
this pdf is where they added it to PCI 2.2 as an ECN: http://www.pcisig.com/specifications/conventional/conventional_pci/reset_ecn...