Hi
As I remarked in the opening email to the SMDK6400 patch-series, I've got a strange problem, I cannot understand.
Here're the c-code:
typedef struct { volatile u32 TCNTB; volatile u32 TCMPB; volatile u32 TCNTO; } s3c64xx_timer;
typedef struct { volatile u32 TCFG0; volatile u32 TCFG1; volatile u32 TCON; s3c64xx_timer ch[4]; volatile u32 TCNTB4; volatile u32 TCNTO4; } s3c64xx_timers;
static s3c64xx_timers *s3c64xx_get_base_timers(void) { return (s3c64xx_timers *)ELFIN_TIMER_BASE; }
/* macro to read the 16 bit timer */ static inline ulong read_timer(void) { s3c64xx_timers *const timers = s3c64xx_get_base_timers();
return timers->TCNTO4; }
The respective assembly code is quite simple:
00000000 <read_timer>: 0: e59f3004 ldr r3, [pc, #4] ; c <timer_load_val> 4: e5930040 ldr r0, [r3, #64] 8: e12fff1e bx lr c: 7f006000 swivc 0x00006000
Perfect. Now, if I make the two structs above packed, I get this assembly:
00000000 <read_timer>: 0: e59f301c ldr r3, [pc, #28] ; 24 <.text+0x24> 4: e5d30040 ldrb r0, [r3, #64] 8: e5d32041 ldrb r2, [r3, #65] c: e5d31042 ldrb r1, [r3, #66] 10: e1800402 orr r0, r0, r2, lsl #8 14: e5d33043 ldrb r3, [r3, #67] 18: e1800801 orr r0, r0, r1, lsl #16 1c: e1800c03 orr r0, r0, r3, lsl #24 20: e12fff1e bx lr 24: 7f006000 swivc 0x00006000
which converts all accesses to the structure to 8-bit... Ideas? Toolchain eldk-4.1. U-Boot from nand/testing git with the patches I just sent to the list, configured for smdk6400_config.
Thanks Guennadi --- Guennadi Liakhovetski, Ph.D.
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