Add node for tegra20 SPI SFLASH controller to fdt.
Signed-off-by: Allen Martin amartin@nvidia.com --- arch/arm/dts/tegra20.dtsi | 12 ++++++++++++ board/nvidia/dts/tegra20-seaboard.dts | 4 ++++ 2 files changed, 16 insertions(+)
diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi index 9739f91..4d7dee9 100644 --- a/arch/arm/dts/tegra20.dtsi +++ b/arch/arm/dts/tegra20.dtsi @@ -236,6 +236,18 @@ clocks = <&tegra_car 12>, <&tegra_car 124>; };
+ spi@7000c380 { + compatible = "nvidia,tegra20-sflash"; + reg = <0x7000c380 0x80>; + interrupts = <0 39 0x04>; + nvidia,dma-request-selector = <&apbdma 11>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + /* PERIPH_ID_SPI1, PLLP_OUT0 */ + clocks = <&tegra_car 43>; + }; + i2c@7000c400 { #address-cells = <1>; #size-cells = <0>; diff --git a/board/nvidia/dts/tegra20-seaboard.dts b/board/nvidia/dts/tegra20-seaboard.dts index b0da0be..eb92e06 100644 --- a/board/nvidia/dts/tegra20-seaboard.dts +++ b/board/nvidia/dts/tegra20-seaboard.dts @@ -78,6 +78,10 @@ clock-frequency = <100000>; };
+ spi@7000c380 { + spi-max-frequency = <25000000>; + }; + i2c@7000c400 { status = "disabled"; };