On Sun, 2020-08-16 at 10:24 +0200, Frank Wunderlich wrote:
From: Frank Wunderlich frank-w@public-files.de
Add DTS nodes for MT7622/BPI-R64
Signed-off-by: Frank Wunderlich frank-w@public-files.de
v1->v2:
- add USB nodes to MT7622 reference board
arch/arm/dts/mt7622-bananapi-bpi-r64.dts | 8 +++ arch/arm/dts/mt7622-rfb.dts | 8 +++ arch/arm/dts/mt7622.dtsi | 64 ++++++++++++++++++++++++ 3 files changed, 80 insertions(+)
diff --git a/arch/arm/dts/mt7622-bananapi-bpi-r64.dts b/arch/arm/dts/mt7622-bananapi-bpi-r64.dts index c36ec8f8d0..7cd581cf7d 100644 --- a/arch/arm/dts/mt7622-bananapi-bpi-r64.dts +++ b/arch/arm/dts/mt7622-bananapi-bpi-r64.dts @@ -213,3 +213,11 @@ output-low; }; };
+&ssusb {
- status = "okay";
+};
+&u3phy {
- status = "okay";
+}; diff --git a/arch/arm/dts/mt7622-rfb.dts b/arch/arm/dts/mt7622-rfb.dts index 317fc78abd..ef7d0f0270 100644 --- a/arch/arm/dts/mt7622-rfb.dts +++ b/arch/arm/dts/mt7622-rfb.dts @@ -222,3 +222,11 @@ full-duplex; }; };
+&ssusb {
- status = "okay";
+};
+&u3phy {
status = "okay";+}; diff --git a/arch/arm/dts/mt7622.dtsi b/arch/arm/dts/mt7622.dtsi index c43ad65702..c69f9d7d73 100644 --- a/arch/arm/dts/mt7622.dtsi +++ b/arch/arm/dts/mt7622.dtsi @@ -81,6 +81,12 @@ #clock-cells = <0>; };
- clk25m: dummy25m {
compatible = "fixed-clock";clock-frequency = <25000000>;#clock-cells = <0>;- };
- infracfg: infracfg@10000000 { compatible = "mediatek,mt7622-infracfg", "syscon";
@@ -192,6 +198,14 @@ status = "disabled"; };
- ssusbsys: ssusbsys@1a000000 {
compatible = "mediatek,mt7622-ssusbsys","syscon";reg = <0x1a000000 0x1000>;#clock-cells = <1>;#reset-cells = <1>;- };
- pciesys: pciesys@1a100800 { compatible = "mediatek,mt7622-pciesys", "syscon"; reg = <0x1a100800 0x1000>;
@@ -302,6 +316,56 @@ }; };
- ssusb: usb@1a0c0000 {
compatible = "mediatek,mt7622-xhci","mediatek,mtk-xhci";reg = <0x1a0c0000 0x01000>,<0x1a0c4700 0x0100>;reg-names = "mac", "ippc";interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_LOW>;power-domains = <&scpsys MT7629_POWER_DOMAIN_HIF1>;clocks = <&ssusbsys CLK_SSUSB_SYS_EN>,<&ssusbsys CLK_SSUSB_REF_EN>,<&ssusbsys CLK_SSUSB_MCU_EN>,<&ssusbsys CLK_SSUSB_DMA_EN>;clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";phys = <&u2port0 PHY_TYPE_USB2>,<&u3port0 PHY_TYPE_USB3>,<&u2port1 PHY_TYPE_USB2>;status = "disabled";- };
- u3phy: usb-phy@1a0c4000 {
compatible = "mediatek,mt7622-u3phy","mediatek,generic-tphy-v1";reg = <0x1a0c4000 0x700>;#address-cells = <1>;#size-cells = <1>;ranges;status = "disabled";u2port0: usb-phy@1a0c4800 {reg = <0x1a0c4800 0x0100>;#phy-cells = <1>;clocks = <&ssusbsys CLK_SSUSB_U2_PHY_EN>;clock-names = "ref";};u3port0: usb-phy@1a0c4900 {reg = <0x1a0c4900 0x0700>;#phy-cells = <1>;clocks = <&clk25m>;clock-names = "ref";
clock is optional, if we can't control it, skip it is also fine.
};u2port1: usb-phy@1a0c5000 {reg = <0x1a0c5000 0x0100>;#phy-cells = <1>;clocks = <&ssusbsys CLK_SSUSB_U2_PHY_1P_EN>;clock-names = "ref";};- };
Reviewed-by: Chunfeng Yun chunfeng.yun@mediatek.com Thank you
- ethsys: syscon@1b000000 { compatible = "mediatek,mt7622-ethsys", "syscon"; reg = <0x1b000000 0x1000>;