On 07/03/2018 12:08 PM, Andre Przywara wrote:
Hi,
Hi,
On 03/07/18 09:24, Marek Vasut wrote:
On 07/03/2018 01:44 AM, Andre Przywara wrote:
The USB host controllers on the H3, H5 and A64 have the oddity of sharing some clock and reset gates, so both the OHCI and EHCI bits have to be enabled to make only one of them working. We take care of this, and initialisation works fine (due to setting already set bits). However on shutdown we turn the clocks and reset gates off already when deregistering one controller, so the other one is no longer functional. In the result U-Boot complains just before launching the kernel and then hangs. Fix this by not turning off the clocks and resets on the OHCI side, so that the EHCI controller has a chance to properly shut down. This still isn't perfect, but at least prevents the hang.
Signed-off-by: Andre Przywara andre.przywara@arm.com
What about adding some enable/disable counter to those clock somehow and then turning them off when the counter reaches zero ?
Yes, that's what I meant with "proper ref-counting" below. The problem is that this would need to go across the two files ([oe]hci-sunxi.c), and be per bit. So it wouldn't be too pretty or easy.
Some temporary enable/disable_clock() function shared by those two drivers might be doable in this short timeframe, no ?
But the clocks and resets should be handled by a proper DM driver, which is just around the corner (check the link to this branch on my github below).
Good. Last time I asked why there is no proper clock driver, I got quite a lot of flak in that I am asking for too much.
So I don't like to spend too much time on it. We don't need USB for the SPL, so we can actually remove this code once we have DM_CLK. For now I just need to fix that hang to unblock the DT updates.
I want something which stops the clock properly for this release. So if you can come up with something like that, great. And then the clock driver would be awesome for the next release or so.
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