Hi, all I work to add mpc7448hpc2 board to u-boot. I checked the u-boot code cpu/74xx_74xx/speed.c and found the following issue:
static const int hid1_multipliers_x_10[] = { 25, /* 0000 - 2.5x */ 75, /* 0001 - 7.5x */ 70, /* 0010 - 7x */ 10, /* 0011 - bypass */ 20, /* 0100 - 2x */ 65, /* 0101 - 6.5x */ 100, /* 0110 - 10x */ 45, /* 0111 - 4.5x */ 30, /* 1000 - 3x */ 55, /* 1001 - 5.5x */ 40, /* 1010 - 4x */ 50, /* 1011 - 5x */ 80, /* 1100 - 8x */ 60, /* 1101 - 6x */ 35, /* 1110 - 3.5x */ 0 /* 1111 - off */ };
int get_clocks (void) { ulong clock = 0;
/* calculate the clock frequency based upon the CPU type */ switch (get_cpu_type()) { case CPU_7448: case CPU_7455: case CPU_7457: /* * It is assumed that the PLL_EXT line is zero. * Make sure division is done before multiplication to prevent 32-bit * arithmetic overflows which will cause a negative number */ clock = (CFG_BUS_CLK / 10) * hid1_multipliers_x_10[(get_hid1 () >> 13) & 0xF]; break;
Roy: Can the hid1_multipliers_x_10 table reflect the PLL configuration of 7448/7455/7457? There are five bit for 7455/7457 to configure the PLL.
case CPU_750GX: case CPU_750FX: clock = CFG_BUS_CLK * hid1_fx_multipliers_x_10[get_hid1 () >> 27] / 10; break;
case CPU_7450:
Roy: Why does 7450 locates here? Its hid1 has the same behavior as 7455/7457.
case CPU_740: case CPU_740P: case CPU_745: case CPU_750CX: case CPU_750: case CPU_750P: case CPU_755: case CPU_7400: case CPU_7410: /* * Make sure division is done before multiplication to prevent 32-bit * arithmetic overflows which will cause a negative number */ clock = (CFG_BUS_CLK / 10) * hid1_multipliers_x_10[get_hid1 () >> 28];
Roy: hid1_multipliers_x_10 is suitable here :-).
If this issue can be confirmed, I will add a patch in my mpc7448hpc2 git tree at http://opensource.freescale.com Thanks! Roy