RE: [PATCH 7/9] ram: stm32mp1_ddr: fix self refresh disable during DQS training

Hi,

From: Patrick DELAUNAY patrick.delaunay@st.com Sent: vendredi 6 mars 2020 11:14

DDRCTRL_PWRCTL.SELFREF_EN needs to be reset before DQS training step, not to enter in self refresh mode during the execution of this phase. Depending on settings, it can be set after the DQS training.

Signed-off-by: Patrick Delaunay patrick.delaunay@st.com

Applied to u-boot-stm/next, thanks!

Regards

Patrick