The patch set is used to support i.MX8ULP A1 revision. It includes below changes: a) XRDC/TRDC are enabled by default on A1 via DBD_EN fuse programmed. So necessary changes for XRDC setting are added. And TRDC is totally moved to RTD. A handshake is added to sync with RTD for the XRDC and TRDC setting completion. b) S400 API update and fuse update c) DDR timing and driver update d) clock setting update to match max rate restriction e) uPower API update and code clean
Jacky Bai (2): ddr: imx: Update the ddr init flow on imx8ulp imx8ulp_evk: Update the DDR timing
Peng Fan (3): imx: imx8ulp: upower: replace magic number with macro imx: imx8ulp: upower: make code cleaner imx8ulp_evk: disable overflow of port0 for LPAV
Ye Li (18): imx: imx8ulp: Fix MU device probe failure imx: imx8ulp: Get chip revision from Sentinel imx: imx8ulp: Limit the eMMC ROM API workaround to A0.1 part imx: imx8ulp: Set XRDC MRC4/5 for access DDR from APD imx: imx8ulp: Remove the TRDC configure from A35 imx: imx8ulp: Adjust handshake to sync TRDC and XRDC completion imx: imx8ulp: configure XRDC for DRAM access from S400 ddr: imx8ulp: Change DRAM timing save area to 0x20055000 imx: imx8ulp: Reconfigure MRC3 for SRAM0 access imx: imx8ulp: Clear dividers in PLL3DIV_PFD registers imx: imx8ulp: Configure XRDC PDAC and MSC for DBD owner=S400 only imx: imx8ulp: Update clocks to meet max rate restrictions imx: sentinel: Update S400 API get info message structure misc: fuse: Update fuse mapping for 8ULP S400 API misc: fuse: Lock 8ULP ECC-protected fuse when programming imx8ulp_evk: Change to use DDR driver imx8ulp_evk: Update DDR ports arbitration for DCNANO underrun imx8ulp_evk: Clear data at fdt_addr_r before booting kernel
arch/arm/include/asm/arch-imx8ulp/imx-regs.h | 1 + arch/arm/include/asm/arch-imx8ulp/rdc.h | 1 + arch/arm/include/asm/arch-imx8ulp/sys_proto.h | 2 + arch/arm/include/asm/global_data.h | 3 + arch/arm/include/asm/mach-imx/s400_api.h | 2 + arch/arm/mach-imx/imx8ulp/Kconfig | 1 + arch/arm/mach-imx/imx8ulp/cgc.c | 70 ++++---- arch/arm/mach-imx/imx8ulp/clock.c | 50 +++--- arch/arm/mach-imx/imx8ulp/rdc.c | 71 ++++++++ arch/arm/mach-imx/imx8ulp/soc.c | 208 ++++++++++++++++++----- arch/arm/mach-imx/imx8ulp/upower/upower_hal.c | 112 +++++++++++-- board/freescale/imx8ulp_evk/Makefile | 2 +- board/freescale/imx8ulp_evk/ddr_init.c | 207 ----------------------- board/freescale/imx8ulp_evk/imx8ulp_evk.c | 16 +- board/freescale/imx8ulp_evk/lpddr4_timing.c | 210 ++++++++++++------------ board/freescale/imx8ulp_evk/lpddr4_timing_266.c | 6 +- board/freescale/imx8ulp_evk/spl.c | 18 +- drivers/ddr/imx/imx8ulp/Kconfig | 2 +- drivers/ddr/imx/imx8ulp/ddr_init.c | 55 +++++-- drivers/misc/sentinel/fuse.c | 32 +++- 20 files changed, 605 insertions(+), 464 deletions(-) delete mode 100644 board/freescale/imx8ulp_evk/ddr_init.c