31 Jul
2019
31 Jul
'19
9:23 a.m.
On 22/07/2019 10:16, Neil Armstrong wrote:
Sync the Amlogic Meson G12A DT and Bindings file with the Linux 5.3-rc1 from the commit 5f9e832c1370 ("Linus 5.3-rc1").
Also remove the meson-g12a-u-boot.dtsi and meson-g12a-u200-u-boot.dtsi, now conflicting with the main DT content.
Signed-off-by: Neil Armstrong narmstrong@baylibre.com
arch/arm/dts/meson-g12a-u-boot.dtsi | 216 --- arch/arm/dts/meson-g12a-u200-u-boot.dtsi | 63 - arch/arm/dts/meson-g12a-u200.dts | 122 +- arch/arm/dts/meson-g12a.dtsi | 1825 +++++++++++++++++++- include/dt-bindings/clock/axg-aoclkc.h | 7 +- include/dt-bindings/clock/axg-audio-clkc.h | 30 +- include/dt-bindings/clock/g12a-clkc.h | 3 +- 7 files changed, 1928 insertions(+), 338 deletions(-) delete mode 100644 arch/arm/dts/meson-g12a-u-boot.dtsi delete mode 100644 arch/arm/dts/meson-g12a-u200-u-boot.dtsi
diff --git a/arch/arm/dts/meson-g12a-u-boot.dtsi b/arch/arm/dts/meson-g12a-u-boot.dtsi deleted file mode 100644 index 8e0c81f199..0000000000 --- a/arch/arm/dts/meson-g12a-u-boot.dtsi +++ /dev/null @@ -1,216 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/*
- Copyright (c) 2019 BayLibre, SAS.
- Author: Neil Armstrong narmstrong@baylibre.com
- */
-/ {
- soc {
ethmac: ethernet@ff3f0000 {compatible = "amlogic,meson-axg-dwmac", "snps,dwmac-3.710","snps,dwmac";reg = <0x0 0xff3f0000 0x0 0x100000x0 0xff634540 0x0 0x8>;interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;interrupt-names = "macirq";clocks = <&clkc CLKID_ETH>,<&clkc CLKID_FCLK_DIV2>,<&clkc CLKID_MPLL2>;clock-names = "stmmaceth", "clkin0", "clkin1";status = "disabled";mdio0: mdio {#address-cells = <1>;#size-cells = <0>;compatible = "snps,dwmac-mdio";};};sd_emmc_a: sd@ffe03000 {compatible = "amlogic,meson-axg-mmc";reg = <0x0 0xffe03000 0x0 0x800>;interrupts = <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;status = "disabled";clocks = <&clkc CLKID_SD_EMMC_A>,<&clkc CLKID_SD_EMMC_A_CLK0>,<&clkc CLKID_FCLK_DIV2>;clock-names = "core", "clkin0", "clkin1";resets = <&reset RESET_SD_EMMC_A>;};sd_emmc_b: sd@ffe05000 {compatible = "amlogic,meson-axg-mmc";reg = <0x0 0xffe05000 0x0 0x800>;interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;status = "disabled";clocks = <&clkc CLKID_SD_EMMC_B>,<&clkc CLKID_SD_EMMC_B_CLK0>,<&clkc CLKID_FCLK_DIV2>;clock-names = "core", "clkin0", "clkin1";resets = <&reset RESET_SD_EMMC_B>;};sd_emmc_c: mmc@ffe07000 {compatible = "amlogic,meson-axg-mmc";reg = <0x0 0xffe07000 0x0 0x800>;interrupts = <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>;status = "disabled";clocks = <&clkc CLKID_SD_EMMC_C>,<&clkc CLKID_SD_EMMC_C_CLK0>,<&clkc CLKID_FCLK_DIV2>;clock-names = "core", "clkin0", "clkin1";resets = <&reset RESET_SD_EMMC_C>;};- };
-};
-&periphs_pinctrl {
- emmc_pins: emmc {
mux {groups = "emmc_nand_d0","emmc_nand_d1","emmc_nand_d2","emmc_nand_d3","emmc_nand_d4","emmc_nand_d5","emmc_nand_d6","emmc_nand_d7","emmc_clk","emmc_cmd";function = "emmc";bias-pull-up;};- };
- emmc_ds_pins: emmc-ds {
mux {groups = "emmc_nand_ds";function = "emmc";bias-pull-down;};- };
- emmc_clk_gate_pins: emmc_clk_gate {
mux {groups = "BOOT_8";function = "gpio_periphs";bias-pull-down;};- };
- eth_leds_pins: eth-leds {
mux {groups = "eth_link_led","eth_act_led";function = "eth";bias-disable;};- };
- eth_rmii_pins: eth-rmii {
mux {groups = "eth_mdio","eth_mdc","eth_rgmii_rx_clk","eth_rx_dv","eth_rxd0","eth_rxd1","eth_txen","eth_txd0","eth_txd1";function = "eth";bias-disable;};- };
- eth_rgmii_pins: eth-rgmii {
mux {groups = "eth_rxd2_rgmii","eth_rxd3_rgmii","eth_rgmii_tx_clk","eth_txd2_rgmii","eth_txd3_rgmii";function = "eth";bias-disable;};- };
- sdcard_c_pins: sdcard_c {
mux {groups = "sdcard_d0_c","sdcard_d1_c","sdcard_d2_c","sdcard_d3_c","sdcard_cmd_c","sdcard_clk_c";function = "sdcard";bias-pull-up;};- };
- sdcard_clk_gate_c_pins: sdcard_clk_gate_c {
mux {groups = "GPIOC_4";function = "gpio_periphs";bias-pull-down;};- };
- sdcard_z_pins: sdcard_z {
mux {groups = "sdcard_d0_z","sdcard_d1_z","sdcard_d2_z","sdcard_d3_z","sdcard_cmd_z","sdcard_clk_z";function = "sdcard";bias-pull-up;};- };
- sdcard_clk_gate_z_pins: sdcard_clk_gate_z {
mux {groups = "GPIOZ_6";function = "gpio_periphs";bias-pull-down;};- };
-};
-&periphs {
- eth_phy: mdio-multiplexer@4c000 {
compatible = "amlogic,g12a-mdio-mux";reg = <0x0 0x4c000 0x0 0xa4>;clocks = <&clkc CLKID_ETH_PHY>,<&xtal>,<&clkc CLKID_MPLL_5OM>;clock-names = "pclk", "clkin0", "clkin1";mdio-parent-bus = <&mdio0>;#address-cells = <1>;#size-cells = <0>;ext_mdio: mdio@0 {reg = <0>;#address-cells = <1>;#size-cells = <0>;};int_mdio: mdio@1 {reg = <1>;#address-cells = <1>;#size-cells = <0>;internal_ephy: ethernet_phy@8 {compatible = "ethernet-phy-id0180.3300","ethernet-phy-ieee802.3-c22";reg = <8>;max-speed = <100>;/* FIXME: Add irq support */};};- };
-};
diff --git a/arch/arm/dts/meson-g12a-u200-u-boot.dtsi b/arch/arm/dts/meson-g12a-u200-u-boot.dtsi deleted file mode 100644 index 9486ab0c47..0000000000 --- a/arch/arm/dts/meson-g12a-u200-u-boot.dtsi +++ /dev/null @@ -1,63 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/*
- Copyright (c) 2019 BayLibre, SAS.
- Author: Neil Armstrong narmstrong@baylibre.com
- */
-#include "meson-g12a-u-boot.dtsi"
- / {
- aliases {
ethernet0 = ðmac;- };
- emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;- };
-};
-ðmac {
- status = "okay";
- pinctrl-0 = <ð_leds_pins>;
- pinctrl-names = "default";
- phy-handle = <&internal_ephy>;
- phy-mode = "rmii";
-};
-/* SD card */ -&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_3v3>;
-};
-/* eMMC */ -&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&flash_1v8>;
-}; diff --git a/arch/arm/dts/meson-g12a-u200.dts b/arch/arm/dts/meson-g12a-u200.dts index 0e8045b8a9..8551fbd4a4 100644 --- a/arch/arm/dts/meson-g12a-u200.dts +++ b/arch/arm/dts/meson-g12a-u200.dts @@ -15,14 +15,12 @@
aliases { serial0 = &uart_AO;
ethernet0 = ðmac;- chosen { stdout-path = "serial0:115200n8"; };
memory@0 {
device_type = "memory";reg = <0x0 0x0 0x0 0x40000000>;};
cvbs-connector { compatible = "composite-video-connector";
@@ -34,13 +32,9 @@ }; };
- flash_1v8: regulator-flash_1v8 {
compatible = "regulator-fixed";regulator-name = "FLASH_1V8";regulator-min-microvolt = <1800000>;regulator-max-microvolt = <1800000>;vin-supply = <&vcc_3v3>;regulator-always-on;
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;};
hdmi-connector {
@@ -54,6 +48,20 @@ }; };
- memory@0 {
device_type = "memory";reg = <0x0 0x0 0x0 0x40000000>;- };
- flash_1v8: regulator-flash_1v8 {
compatible = "regulator-fixed";regulator-name = "FLASH_1V8";regulator-min-microvolt = <1800000>;regulator-max-microvolt = <1800000>;vin-supply = <&vcc_3v3>;regulator-always-on;- };
- main_12v: regulator-main_12v { compatible = "regulator-fixed"; regulator-name = "12V";
@@ -62,6 +70,17 @@ regulator-always-on; };
- usb_pwr_en: regulator-usb_pwr_en {
compatible = "regulator-fixed";regulator-name = "USB_PWR_EN";regulator-min-microvolt = <5000000>;regulator-max-microvolt = <5000000>;vin-supply = <&vcc_5v>;gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;enable-active-high;- };
- vcc_1v8: regulator-vcc_1v8 { compatible = "regulator-fixed"; regulator-name = "VCC_1V8";
@@ -92,17 +111,6 @@ enable-active-high; };
- usb_pwr_en: regulator-usb_pwr_en {
compatible = "regulator-fixed";regulator-name = "USB_PWR_EN";regulator-min-microvolt = <5000000>;regulator-max-microvolt = <5000000>;vin-supply = <&vcc_5v>;gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;enable-active-high;- };
- vddao_1v8: regulator-vddao_1v8 { compatible = "regulator-fixed"; regulator-name = "VDDAO_1V8";
@@ -143,6 +151,12 @@ }; };
+ðmac {
- status = "okay";
- phy-handle = <&internal_ephy>;
- phy-mode = "rmii";
+};
&hdmi_tx { status = "okay"; pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; @@ -156,6 +170,70 @@ }; };
+&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
+};
+/* i2c Touch */ +&i2c0 {
- status = "okay";
- pinctrl-0 = <&i2c0_sda_z0_pins>, <&i2c0_sck_z1_pins>;
- pinctrl-names = "default";
+};
+/* i2c CM */ +&i2c2 {
- status = "okay";
- pinctrl-0 = <&i2c2_sda_z_pins>, <&i2c2_sck_z_pins>;
- pinctrl-names = "default";
+};
+/* i2c Audio */ +&i2c3 {
- status = "okay";
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
+};
+/* SD card */ +&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_3v3>;
+};
+/* eMMC */ +&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&flash_1v8>;
+};
&uart_AO { status = "okay"; pinctrl-0 = <&uart_ao_a_pins>; diff --git a/arch/arm/dts/meson-g12a.dtsi b/arch/arm/dts/meson-g12a.dtsi index 9f72396ba7..f8d43e3dcf 100644 --- a/arch/arm/dts/meson-g12a.dtsi +++ b/arch/arm/dts/meson-g12a.dtsi @@ -5,10 +5,12 @@
#include <dt-bindings/phy/phy.h> #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/clock/axg-audio-clkc.h> #include <dt-bindings/clock/g12a-clkc.h> #include <dt-bindings/clock/g12a-aoclkc.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h> #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
/ { @@ -18,6 +20,39 @@ #address-cells = <2>; #size-cells = <2>;
- tdmif_a: audio-controller-0 {
compatible = "amlogic,axg-tdm-iface";#sound-dai-cells = <0>;sound-name-prefix = "TDM_A";clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,<&clkc_audio AUD_CLKID_MST_A_SCLK>,<&clkc_audio AUD_CLKID_MST_A_LRCLK>;clock-names = "mclk", "sclk", "lrclk";status = "disabled";- };
- tdmif_b: audio-controller-1 {
compatible = "amlogic,axg-tdm-iface";#sound-dai-cells = <0>;sound-name-prefix = "TDM_B";clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,<&clkc_audio AUD_CLKID_MST_B_SCLK>,<&clkc_audio AUD_CLKID_MST_B_LRCLK>;clock-names = "mclk", "sclk", "lrclk";status = "disabled";- };
- tdmif_c: audio-controller-2 {
compatible = "amlogic,axg-tdm-iface";#sound-dai-cells = <0>;sound-name-prefix = "TDM_C";clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,<&clkc_audio AUD_CLKID_MST_C_SCLK>,<&clkc_audio AUD_CLKID_MST_C_LRCLK>;clock-names = "mclk", "sclk", "lrclk";status = "disabled";- };
- cpus { #address-cells = <0x2>; #size-cells = <0x0>;
@@ -102,6 +137,27 @@ #size-cells = <2>; ranges;
ethmac: ethernet@ff3f0000 {compatible = "amlogic,meson-axg-dwmac","snps,dwmac-3.70a","snps,dwmac";reg = <0x0 0xff3f0000 0x0 0x100000x0 0xff634540 0x0 0x8>;interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;interrupt-names = "macirq";clocks = <&clkc CLKID_ETH>,<&clkc CLKID_FCLK_DIV2>,<&clkc CLKID_MPLL2>;clock-names = "stmmaceth", "clkin0", "clkin1";status = "disabled";mdio0: mdio {#address-cells = <1>;#size-cells = <0>;compatible = "snps,dwmac-mdio";};};- apb: bus@ff600000 { compatible = "simple-bus"; reg = <0x0 0xff600000 0x0 0x200000>;
@@ -123,6 +179,7 @@ clock-names = "isfr", "iahb", "venci"; #address-cells = <1>; #size-cells = <0>;
#sound-dai-cells = <0>; status = "disabled"; /* VPU VENC Input */@@ -140,6 +197,19 @@ }; };
apb_efuse: bus@30000 {compatible = "simple-bus";reg = <0x0 0x30000 0x0 0x2000>;#address-cells = <2>;#size-cells = <2>;ranges = <0x0 0x0 0x0 0x30000 0x0 0x2000>;hwrng: rng@218 {compatible = "amlogic,meson-rng";reg = <0x0 0x218 0x0 0x4>;};};periphs: bus@34400 { compatible = "simple-bus"; reg = <0x0 0x34400 0x0 0x400>;@@ -169,35 +239,1112 @@ gpio-ranges = <&periphs_pinctrl 0 0 86>; };
cec_ao_a_h_pins: cec_ao_a_h {
cec_ao_a_h_pins: cec_ao_a_h {mux {groups = "cec_ao_a_h";function = "cec_ao_a_h";bias-disable;};};cec_ao_b_h_pins: cec_ao_b_h {mux {groups = "cec_ao_b_h";function = "cec_ao_b_h";bias-disable;};};emmc_pins: emmc {mux-0 {groups = "emmc_nand_d0","emmc_nand_d1","emmc_nand_d2","emmc_nand_d3","emmc_nand_d4","emmc_nand_d5","emmc_nand_d6","emmc_nand_d7","emmc_cmd";function = "emmc";bias-pull-up;drive-strength-microamp = <4000>;};mux-1 {groups = "emmc_clk";function = "emmc";bias-disable;drive-strength-microamp = <4000>;};};emmc_ds_pins: emmc-ds {mux {groups = "emmc_nand_ds";function = "emmc";bias-pull-down;drive-strength-microamp = <4000>;};};emmc_clk_gate_pins: emmc_clk_gate {mux {groups = "BOOT_8";function = "gpio_periphs";bias-pull-down;drive-strength-microamp = <4000>;};};hdmitx_ddc_pins: hdmitx_ddc {mux {groups = "hdmitx_sda","hdmitx_sck";function = "hdmitx";bias-disable;drive-strength-microamp = <4000>;};};hdmitx_hpd_pins: hdmitx_hpd {mux {groups = "hdmitx_hpd_in";function = "hdmitx";bias-disable;};};i2c0_sda_c_pins: i2c0-sda-c {mux {groups = "i2c0_sda_c";function = "i2c0";bias-disable;drive-strength-microamp = <3000>;};};i2c0_sck_c_pins: i2c0-sck-c {mux {groups = "i2c0_sck_c";function = "i2c0";bias-disable;drive-strength-microamp = <3000>;};};i2c0_sda_z0_pins: i2c0-sda-z0 {mux {groups = "i2c0_sda_z0";function = "i2c0";bias-disable;drive-strength-microamp = <3000>;};};i2c0_sck_z1_pins: i2c0-sck-z1 {mux {groups = "i2c0_sck_z1";function = "i2c0";bias-disable;drive-strength-microamp = <3000>;};};i2c0_sda_z7_pins: i2c0-sda-z7 {mux {groups = "i2c0_sda_z7";function = "i2c0";bias-disable;drive-strength-microamp = <3000>;};};i2c0_sda_z8_pins: i2c0-sda-z8 {mux {groups = "i2c0_sda_z8";function = "i2c0";bias-disable;drive-strength-microamp = <3000>;};};i2c1_sda_x_pins: i2c1-sda-x {mux {groups = "i2c1_sda_x";function = "i2c1";bias-disable;drive-strength-microamp = <3000>;};};i2c1_sck_x_pins: i2c1-sck-x {mux {groups = "i2c1_sck_x";function = "i2c1";bias-disable;drive-strength-microamp = <3000>;};};i2c1_sda_h2_pins: i2c1-sda-h2 {mux {groups = "i2c1_sda_h2";function = "i2c1";bias-disable;drive-strength-microamp = <3000>;};};i2c1_sck_h3_pins: i2c1-sck-h3 {mux {groups = "i2c1_sck_h3";function = "i2c1";bias-disable;drive-strength-microamp = <3000>;};};i2c1_sda_h6_pins: i2c1-sda-h6 {mux {groups = "i2c1_sda_h6";function = "i2c1";bias-disable;drive-strength-microamp = <3000>;};};i2c1_sck_h7_pins: i2c1-sck-h7 {mux {groups = "i2c1_sck_h7";function = "i2c1";bias-disable;drive-strength-microamp = <3000>;};};i2c2_sda_x_pins: i2c2-sda-x {mux {groups = "i2c2_sda_x";function = "i2c2";bias-disable;drive-strength-microamp = <3000>;};};i2c2_sck_x_pins: i2c2-sck-x {mux {groups = "i2c2_sck_x";function = "i2c2";bias-disable;drive-strength-microamp = <3000>;};};i2c2_sda_z_pins: i2c2-sda-z {mux {groups = "i2c2_sda_z";function = "i2c2";bias-disable;drive-strength-microamp = <3000>;};};i2c2_sck_z_pins: i2c2-sck-z {mux {groups = "i2c2_sck_z";function = "i2c2";bias-disable;drive-strength-microamp = <3000>;};};i2c3_sda_h_pins: i2c3-sda-h {mux {groups = "i2c3_sda_h";function = "i2c3";bias-disable;drive-strength-microamp = <3000>;};};i2c3_sck_h_pins: i2c3-sck-h {mux {groups = "i2c3_sck_h";function = "i2c3";bias-disable;drive-strength-microamp = <3000>;};};i2c3_sda_a_pins: i2c3-sda-a {mux {groups = "i2c3_sda_a";function = "i2c3";bias-disable;drive-strength-microamp = <3000>;};};i2c3_sck_a_pins: i2c3-sck-a {mux {groups = "i2c3_sck_a";function = "i2c3";bias-disable;drive-strength-microamp = <3000>;};};mclk0_a_pins: mclk0-a {mux {groups = "mclk0_a";function = "mclk0";bias-disable;drive-strength-microamp = <3000>;};};mclk1_a_pins: mclk1-a {mux {groups = "mclk1_a";function = "mclk1";bias-disable;drive-strength-microamp = <3000>;};};mclk1_x_pins: mclk1-x {mux {groups = "mclk1_x";function = "mclk1";bias-disable;drive-strength-microamp = <3000>;};};mclk1_z_pins: mclk1-z {mux {groups = "mclk1_z";function = "mclk1";bias-disable;drive-strength-microamp = <3000>;};};pdm_din0_a_pins: pdm-din0-a {mux {groups = "pdm_din0_a";function = "pdm";bias-disable;};};pdm_din0_c_pins: pdm-din0-c {mux {groups = "pdm_din0_c";function = "pdm";bias-disable;};};pdm_din0_x_pins: pdm-din0-x {mux {groups = "pdm_din0_x";function = "pdm";bias-disable;};};pdm_din0_z_pins: pdm-din0-z {mux {groups = "pdm_din0_z";function = "pdm";bias-disable;};};pdm_din1_a_pins: pdm-din1-a {mux {groups = "pdm_din1_a";function = "pdm";bias-disable;};};pdm_din1_c_pins: pdm-din1-c {mux {groups = "pdm_din1_c";function = "pdm";bias-disable;};};pdm_din1_x_pins: pdm-din1-x {mux {groups = "pdm_din1_x";function = "pdm";bias-disable;};};pdm_din1_z_pins: pdm-din1-z {mux {groups = "pdm_din1_z";function = "pdm";bias-disable;};};pdm_din2_a_pins: pdm-din2-a {mux {groups = "pdm_din2_a";function = "pdm";bias-disable;};};pdm_din2_c_pins: pdm-din2-c {mux {groups = "pdm_din2_c";function = "pdm";bias-disable;};};pdm_din2_x_pins: pdm-din2-x {mux {groups = "pdm_din2_x";function = "pdm";bias-disable;};};pdm_din2_z_pins: pdm-din2-z {mux {groups = "pdm_din2_z";function = "pdm";bias-disable;};};pdm_din3_a_pins: pdm-din3-a {mux {groups = "pdm_din3_a";function = "pdm";bias-disable;};};pdm_din3_c_pins: pdm-din3-c {mux {groups = "pdm_din3_c";function = "pdm";bias-disable;};};pdm_din3_x_pins: pdm-din3-x {mux {groups = "pdm_din3_x";function = "pdm";bias-disable;};};pdm_din3_z_pins: pdm-din3-z {mux {groups = "pdm_din3_z";function = "pdm";bias-disable;};};pdm_dclk_a_pins: pdm-dclk-a {mux {groups = "pdm_dclk_a";function = "pdm";bias-disable;drive-strength-microamp = <500>;};};pdm_dclk_c_pins: pdm-dclk-c {mux {groups = "pdm_dclk_c";function = "pdm";bias-disable;drive-strength-microamp = <500>;};};pdm_dclk_x_pins: pdm-dclk-x {mux {groups = "pdm_dclk_x";function = "pdm";bias-disable;drive-strength-microamp = <500>;};};pdm_dclk_z_pins: pdm-dclk-z {mux {groups = "pdm_dclk_z";function = "pdm";bias-disable;drive-strength-microamp = <500>;};};pwm_a_pins: pwm-a {mux {groups = "pwm_a";function = "pwm_a";bias-disable;};};pwm_b_x7_pins: pwm-b-x7 {mux {groups = "pwm_b_x7";function = "pwm_b";bias-disable;};};pwm_b_x19_pins: pwm-b-x19 {mux {groups = "pwm_b_x19";function = "pwm_b";bias-disable;};};pwm_c_c_pins: pwm-c-c {mux {groups = "pwm_c_c";function = "pwm_c";bias-disable;};};pwm_c_x5_pins: pwm-c-x5 {mux {groups = "pwm_c_x5";function = "pwm_c";bias-disable;};};pwm_c_x8_pins: pwm-c-x8 {mux {groups = "pwm_c_x8";function = "pwm_c";bias-disable;};};pwm_d_x3_pins: pwm-d-x3 {mux {groups = "pwm_d_x3";function = "pwm_d";bias-disable;};};pwm_d_x6_pins: pwm-d-x6 {mux {groups = "pwm_d_x6";function = "pwm_d";bias-disable;};};pwm_e_pins: pwm-e {mux {groups = "pwm_e";function = "pwm_e";bias-disable;};};pwm_f_x_pins: pwm-f-x {mux {groups = "pwm_f_x";function = "pwm_f";bias-disable;};};pwm_f_h_pins: pwm-f-h {mux {groups = "pwm_f_h";function = "pwm_f";bias-disable;};};sdcard_c_pins: sdcard_c {mux-0 {groups = "sdcard_d0_c","sdcard_d1_c","sdcard_d2_c","sdcard_d3_c","sdcard_cmd_c";function = "sdcard";bias-pull-up;drive-strength-microamp = <4000>;};mux-1 {groups = "sdcard_clk_c";function = "sdcard";bias-disable;drive-strength-microamp = <4000>;};};sdcard_clk_gate_c_pins: sdcard_clk_gate_c {mux {groups = "GPIOC_4";function = "gpio_periphs";bias-pull-down;drive-strength-microamp = <4000>;};};sdcard_z_pins: sdcard_z {mux-0 {groups = "sdcard_d0_z","sdcard_d1_z","sdcard_d2_z","sdcard_d3_z","sdcard_cmd_z";function = "sdcard";bias-pull-up;drive-strength-microamp = <4000>;};mux-1 {groups = "sdcard_clk_z";function = "sdcard";bias-disable;drive-strength-microamp = <4000>;};};sdcard_clk_gate_z_pins: sdcard_clk_gate_z {mux {groups = "GPIOZ_6";function = "gpio_periphs";bias-pull-down;drive-strength-microamp = <4000>;};};sdio_pins: sdio {mux {groups = "sdio_d0","sdio_d1","sdio_d2","sdio_d3","sdio_clk","sdio_cmd";function = "sdio";bias-disable;drive-strength-microamp = <4000>;};};sdio_clk_gate_pins: sdio_clk_gate {mux {groups = "GPIOX_4";function = "gpio_periphs";bias-pull-down;drive-strength-microamp = <4000>;};};spdif_in_a10_pins: spdif-in-a10 {mux {groups = "spdif_in_a10";function = "spdif_in";bias-disable;};};spdif_in_a12_pins: spdif-in-a12 {mux {groups = "spdif_in_a12";function = "spdif_in";bias-disable;};};spdif_in_h_pins: spdif-in-h {mux {groups = "spdif_in_h";function = "spdif_in";bias-disable;};};spdif_out_h_pins: spdif-out-h {mux {groups = "spdif_out_h";function = "spdif_out";drive-strength-microamp = <500>;bias-disable;};};spdif_out_a11_pins: spdif-out-a11 {mux {groups = "spdif_out_a11";function = "spdif_out";drive-strength-microamp = <500>;bias-disable;};};spdif_out_a13_pins: spdif-out-a13 {mux {groups = "spdif_out_a13";function = "spdif_out";drive-strength-microamp = <500>;bias-disable;};};tdm_a_din0_pins: tdm-a-din0 {mux {groups = "tdm_a_din0";function = "tdm_a";bias-disable;};};tdm_a_din1_pins: tdm-a-din1 {mux {groups = "tdm_a_din1";function = "tdm_a";bias-disable;};};tdm_a_dout0_pins: tdm-a-dout0 {mux {groups = "tdm_a_dout0";function = "tdm_a";bias-disable;drive-strength-microamp = <3000>;};};tdm_a_dout1_pins: tdm-a-dout1 {mux {groups = "tdm_a_dout1";function = "tdm_a";bias-disable;drive-strength-microamp = <3000>;};};tdm_a_fs_pins: tdm-a-fs {mux {groups = "tdm_a_fs";function = "tdm_a";bias-disable;drive-strength-microamp = <3000>;};};tdm_a_sclk_pins: tdm-a-sclk {mux {groups = "tdm_a_sclk";function = "tdm_a";bias-disable;drive-strength-microamp = <3000>;};};tdm_a_slv_fs_pins: tdm-a-slv-fs {mux {groups = "tdm_a_slv_fs";function = "tdm_a";bias-disable;};};tdm_a_slv_sclk_pins: tdm-a-slv-sclk {mux {groups = "tdm_a_slv_sclk";function = "tdm_a";bias-disable;};};tdm_b_din0_pins: tdm-b-din0 {mux {groups = "tdm_b_din0";function = "tdm_b";bias-disable;};};tdm_b_din1_pins: tdm-b-din1 {mux {groups = "tdm_b_din1";function = "tdm_b";bias-disable;};};tdm_b_din2_pins: tdm-b-din2 {mux {groups = "tdm_b_din2";function = "tdm_b";bias-disable;};};tdm_b_din3_a_pins: tdm-b-din3-a {mux {groups = "tdm_b_din3_a";function = "tdm_b";bias-disable;};};tdm_b_din3_h_pins: tdm-b-din3-h {mux {groups = "tdm_b_din3_h";function = "tdm_b";bias-disable;};};tdm_b_dout0_pins: tdm-b-dout0 {mux {groups = "tdm_b_dout0";function = "tdm_b";bias-disable;drive-strength-microamp = <3000>;};};tdm_b_dout1_pins: tdm-b-dout1 {mux {groups = "tdm_b_dout1";function = "tdm_b";bias-disable;drive-strength-microamp = <3000>;};};tdm_b_dout2_pins: tdm-b-dout2 {mux {groups = "tdm_b_dout2";function = "tdm_b";bias-disable;drive-strength-microamp = <3000>;};};tdm_b_dout3_a_pins: tdm-b-dout3-a {mux {groups = "tdm_b_dout3_a";function = "tdm_b";bias-disable;drive-strength-microamp = <3000>;};};tdm_b_dout3_h_pins: tdm-b-dout3-h {mux {groups = "tdm_b_dout3_h";function = "tdm_b";bias-disable;drive-strength-microamp = <3000>;};};tdm_b_fs_pins: tdm-b-fs {mux {groups = "tdm_b_fs";function = "tdm_b";bias-disable;drive-strength-microamp = <3000>;};};tdm_b_sclk_pins: tdm-b-sclk {mux {groups = "tdm_b_sclk";function = "tdm_b";bias-disable;drive-strength-microamp = <3000>;};};tdm_b_slv_fs_pins: tdm-b-slv-fs {mux {groups = "tdm_b_slv_fs";function = "tdm_b";bias-disable;};};tdm_b_slv_sclk_pins: tdm-b-slv-sclk {mux {groups = "tdm_b_slv_sclk";function = "tdm_b";bias-disable;};};tdm_c_din0_a_pins: tdm-c-din0-a {mux {groups = "tdm_c_din0_a";function = "tdm_c";bias-disable;};};tdm_c_din0_z_pins: tdm-c-din0-z {mux {groups = "tdm_c_din0_z";function = "tdm_c";bias-disable;};};tdm_c_din1_a_pins: tdm-c-din1-a {mux {groups = "tdm_c_din1_a";function = "tdm_c";bias-disable;};};tdm_c_din1_z_pins: tdm-c-din1-z {mux {groups = "tdm_c_din1_z";function = "tdm_c";bias-disable;};};tdm_c_din2_a_pins: tdm-c-din2-a {mux {groups = "tdm_c_din2_a";function = "tdm_c";bias-disable;};};eth_leds_pins: eth-leds {mux {groups = "eth_link_led","eth_act_led";function = "eth";bias-disable;};};eth_pins: eth {mux {groups = "eth_mdio","eth_mdc","eth_rgmii_rx_clk","eth_rx_dv","eth_rxd0","eth_rxd1","eth_txen","eth_txd0","eth_txd1";function = "eth";drive-strength-microamp = <4000>;bias-disable;};};eth_rgmii_pins: eth-rgmii {mux {groups = "eth_rxd2_rgmii","eth_rxd3_rgmii","eth_rgmii_tx_clk","eth_txd2_rgmii","eth_txd3_rgmii";function = "eth";drive-strength-microamp = <4000>;bias-disable;};};tdm_c_din2_z_pins: tdm-c-din2-z {mux {groups = "tdm_c_din2_z";function = "tdm_c";bias-disable;};};tdm_c_din3_a_pins: tdm-c-din3-a {mux {groups = "tdm_c_din3_a";function = "tdm_c";bias-disable;};};tdm_c_din3_z_pins: tdm-c-din3-z {mux {groups = "tdm_c_din3_z";function = "tdm_c";bias-disable;};};tdm_c_dout0_a_pins: tdm-c-dout0-a {mux {groups = "tdm_c_dout0_a";function = "tdm_c";bias-disable;drive-strength-microamp = <3000>;};};tdm_c_dout0_z_pins: tdm-c-dout0-z {mux {groups = "tdm_c_dout0_z";function = "tdm_c";bias-disable;drive-strength-microamp = <3000>;};};tdm_c_dout1_a_pins: tdm-c-dout1-a {mux {groups = "tdm_c_dout1_a";function = "tdm_c";bias-disable;drive-strength-microamp = <3000>;};};tdm_c_dout1_z_pins: tdm-c-dout1-z {mux {groups = "tdm_c_dout1_z";function = "tdm_c";bias-disable;drive-strength-microamp = <3000>;};};tdm_c_dout2_a_pins: tdm-c-dout2-a {mux {groups = "tdm_c_dout2_a";function = "tdm_c";bias-disable;drive-strength-microamp = <3000>;};};tdm_c_dout2_z_pins: tdm-c-dout2-z {mux {groups = "tdm_c_dout2_z";function = "tdm_c";bias-disable;drive-strength-microamp = <3000>;};};tdm_c_dout3_a_pins: tdm-c-dout3-a {mux {groups = "tdm_c_dout3_a";function = "tdm_c";bias-disable;drive-strength-microamp = <3000>;};};tdm_c_dout3_z_pins: tdm-c-dout3-z {mux {groups = "tdm_c_dout3_z";function = "tdm_c";bias-disable;drive-strength-microamp = <3000>;};};tdm_c_fs_a_pins: tdm-c-fs-a {mux {groups = "tdm_c_fs_a";function = "tdm_c";bias-disable;drive-strength-microamp = <3000>;};};tdm_c_fs_z_pins: tdm-c-fs-z {mux {groups = "tdm_c_fs_z";function = "tdm_c";bias-disable;drive-strength-microamp = <3000>;};};tdm_c_sclk_a_pins: tdm-c-sclk-a { mux {
groups = "cec_ao_a_h";function = "cec_ao_a_h";
groups = "tdm_c_sclk_a";function = "tdm_c"; bias-disable;drive-strength-microamp = <3000>; }; };
cec_ao_b_h_pins: cec_ao_b_h {
tdm_c_sclk_z_pins: tdm-c-sclk-z { mux {
groups = "cec_ao_b_h";function = "cec_ao_b_h";
groups = "tdm_c_sclk_z";function = "tdm_c"; bias-disable;drive-strength-microamp = <3000>; }; };
hdmitx_ddc_pins: hdmitx_ddc {
tdm_c_slv_fs_a_pins: tdm-c-slv-fs-a { mux {
groups = "hdmitx_sda","hdmitx_sck";function = "hdmitx";
groups = "tdm_c_slv_fs_a";function = "tdm_c"; bias-disable; }; };
hdmitx_hpd_pins: hdmitx_hpd {
tdm_c_slv_fs_z_pins: tdm-c-slv-fs-z { mux {
groups = "hdmitx_hpd_in";function = "hdmitx";
groups = "tdm_c_slv_fs_z";function = "tdm_c";bias-disable;};};tdm_c_slv_sclk_a_pins: tdm-c-slv-sclk-a {mux {groups = "tdm_c_slv_sclk_a";function = "tdm_c";bias-disable;};};tdm_c_slv_sclk_z_pins: tdm-c-slv-sclk-z {mux {groups = "tdm_c_slv_sclk_z";function = "tdm_c"; bias-disable; }; };@@ -303,6 +1450,282 @@ }; };
pdm: audio-controller@40000 {compatible = "amlogic,g12a-pdm","amlogic,axg-pdm";reg = <0x0 0x40000 0x0 0x34>;#sound-dai-cells = <0>;sound-name-prefix = "PDM";clocks = <&clkc_audio AUD_CLKID_PDM>,<&clkc_audio AUD_CLKID_PDM_DCLK>,<&clkc_audio AUD_CLKID_PDM_SYSCLK>;clock-names = "pclk", "dclk", "sysclk";status = "disabled";};audio: bus@42000 {compatible = "simple-bus";reg = <0x0 0x42000 0x0 0x2000>;#address-cells = <2>;#size-cells = <2>;ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>;clkc_audio: clock-controller@0 {status = "disabled";compatible = "amlogic,g12a-audio-clkc";reg = <0x0 0x0 0x0 0xb4>;#clock-cells = <1>;clocks = <&clkc CLKID_AUDIO>,<&clkc CLKID_MPLL0>,<&clkc CLKID_MPLL1>,<&clkc CLKID_MPLL2>,<&clkc CLKID_MPLL3>,<&clkc CLKID_HIFI_PLL>,<&clkc CLKID_FCLK_DIV3>,<&clkc CLKID_FCLK_DIV4>,<&clkc CLKID_GP0_PLL>;clock-names = "pclk","mst_in0","mst_in1","mst_in2","mst_in3","mst_in4","mst_in5","mst_in6","mst_in7";resets = <&reset RESET_AUDIO>;};toddr_a: audio-controller@100 {compatible = "amlogic,g12a-toddr","amlogic,axg-toddr";reg = <0x0 0x100 0x0 0x1c>;#sound-dai-cells = <0>;sound-name-prefix = "TODDR_A";interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;clocks = <&clkc_audio AUD_CLKID_TODDR_A>;resets = <&arb AXG_ARB_TODDR_A>;status = "disabled";};toddr_b: audio-controller@140 {compatible = "amlogic,g12a-toddr","amlogic,axg-toddr";reg = <0x0 0x140 0x0 0x1c>;#sound-dai-cells = <0>;sound-name-prefix = "TODDR_B";interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;clocks = <&clkc_audio AUD_CLKID_TODDR_B>;resets = <&arb AXG_ARB_TODDR_B>;status = "disabled";};toddr_c: audio-controller@180 {compatible = "amlogic,g12a-toddr","amlogic,axg-toddr";reg = <0x0 0x180 0x0 0x1c>;#sound-dai-cells = <0>;sound-name-prefix = "TODDR_C";interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;clocks = <&clkc_audio AUD_CLKID_TODDR_C>;resets = <&arb AXG_ARB_TODDR_C>;status = "disabled";};frddr_a: audio-controller@1c0 {compatible = "amlogic,g12a-frddr","amlogic,axg-frddr";reg = <0x0 0x1c0 0x0 0x1c>;#sound-dai-cells = <0>;sound-name-prefix = "FRDDR_A";interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;resets = <&arb AXG_ARB_FRDDR_A>;status = "disabled";};frddr_b: audio-controller@200 {compatible = "amlogic,g12a-frddr","amlogic,axg-frddr";reg = <0x0 0x200 0x0 0x1c>;#sound-dai-cells = <0>;sound-name-prefix = "FRDDR_B";interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;resets = <&arb AXG_ARB_FRDDR_B>;status = "disabled";};frddr_c: audio-controller@240 {compatible = "amlogic,g12a-frddr","amlogic,axg-frddr";reg = <0x0 0x240 0x0 0x1c>;#sound-dai-cells = <0>;sound-name-prefix = "FRDDR_C";interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;resets = <&arb AXG_ARB_FRDDR_C>;status = "disabled";};arb: reset-controller@280 {status = "disabled";compatible = "amlogic,meson-axg-audio-arb";reg = <0x0 0x280 0x0 0x4>;#reset-cells = <1>;clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;};tdmin_a: audio-controller@300 {compatible = "amlogic,g12a-tdmin","amlogic,axg-tdmin";reg = <0x0 0x300 0x0 0x40>;sound-name-prefix = "TDMIN_A";clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,<&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,<&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;clock-names = "pclk", "sclk", "sclk_sel","lrclk", "lrclk_sel";status = "disabled";};tdmin_b: audio-controller@340 {compatible = "amlogic,g12a-tdmin","amlogic,axg-tdmin";reg = <0x0 0x340 0x0 0x40>;sound-name-prefix = "TDMIN_B";clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,<&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,<&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;clock-names = "pclk", "sclk", "sclk_sel","lrclk", "lrclk_sel";status = "disabled";};tdmin_c: audio-controller@380 {compatible = "amlogic,g12a-tdmin","amlogic,axg-tdmin";reg = <0x0 0x380 0x0 0x40>;sound-name-prefix = "TDMIN_C";clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,<&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,<&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;clock-names = "pclk", "sclk", "sclk_sel","lrclk", "lrclk_sel";status = "disabled";};tdmin_lb: audio-controller@3c0 {compatible = "amlogic,g12a-tdmin","amlogic,axg-tdmin";reg = <0x0 0x3c0 0x0 0x40>;sound-name-prefix = "TDMIN_LB";clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;clock-names = "pclk", "sclk", "sclk_sel","lrclk", "lrclk_sel";status = "disabled";};spdifin: audio-controller@400 {compatible = "amlogic,g12a-spdifin","amlogic,axg-spdifin";reg = <0x0 0x400 0x0 0x30>;#sound-dai-cells = <0>;sound-name-prefix = "SPDIFIN";interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,<&clkc_audio AUD_CLKID_SPDIFIN_CLK>;clock-names = "pclk", "refclk";status = "disabled";};spdifout: audio-controller@480 {compatible = "amlogic,g12a-spdifout","amlogic,axg-spdifout";reg = <0x0 0x480 0x0 0x50>;#sound-dai-cells = <0>;sound-name-prefix = "SPDIFOUT";clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,<&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;clock-names = "pclk", "mclk";status = "disabled";};tdmout_a: audio-controller@500 {compatible = "amlogic,g12a-tdmout";reg = <0x0 0x500 0x0 0x40>;sound-name-prefix = "TDMOUT_A";clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;clock-names = "pclk", "sclk", "sclk_sel","lrclk", "lrclk_sel";status = "disabled";};tdmout_b: audio-controller@540 {compatible = "amlogic,g12a-tdmout";reg = <0x0 0x540 0x0 0x40>;sound-name-prefix = "TDMOUT_B";clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;clock-names = "pclk", "sclk", "sclk_sel","lrclk", "lrclk_sel";status = "disabled";};tdmout_c: audio-controller@580 {compatible = "amlogic,g12a-tdmout";reg = <0x0 0x580 0x0 0x40>;sound-name-prefix = "TDMOUT_C";clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;clock-names = "pclk", "sclk", "sclk_sel","lrclk", "lrclk_sel";status = "disabled";};spdifout_b: audio-controller@680 {compatible = "amlogic,g12a-spdifout","amlogic,axg-spdifout";reg = <0x0 0x680 0x0 0x50>;#sound-dai-cells = <0>;sound-name-prefix = "SPDIFOUT_B";clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,<&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;clock-names = "pclk", "mclk";status = "disabled";};tohdmitx: audio-controller@744 {compatible = "amlogic,g12a-tohdmitx";reg = <0x0 0x744 0x0 0x4>;#sound-dai-cells = <1>;sound-name-prefix = "TOHDMITX";status = "disabled";};};usb3_pcie_phy: phy@46000 { compatible = "amlogic,g12a-usb3-pcie-phy"; reg = <0x0 0x46000 0x0 0x2000>;@@ -314,6 +1737,38 @@ assigned-clock-rates = <100000000>; #phy-cells = <1>; };
eth_phy: mdio-multiplexer@4c000 {compatible = "amlogic,g12a-mdio-mux";reg = <0x0 0x4c000 0x0 0xa4>;clocks = <&clkc CLKID_ETH_PHY>,<&xtal>,<&clkc CLKID_MPLL_50M>;clock-names = "pclk", "clkin0", "clkin1";mdio-parent-bus = <&mdio0>;#address-cells = <1>;#size-cells = <0>;ext_mdio: mdio@0 {reg = <0>;#address-cells = <1>;#size-cells = <0>;};int_mdio: mdio@1 {reg = <1>;#address-cells = <1>;#size-cells = <0>;internal_ephy: ethernet_phy@8 {compatible = "ethernet-phy-id0180.3301","ethernet-phy-ieee802.3-c22";interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;reg = <8>;max-speed = <100>;};};};};
aobus: bus@ff800000 {
@@ -401,6 +1856,145 @@ gpio-ranges = <&ao_pinctrl 0 0 15>; };
i2c_ao_sck_pins: i2c_ao_sck_pins {mux {groups = "i2c_ao_sck";function = "i2c_ao";bias-disable;drive-strength-microamp = <3000>;};};i2c_ao_sda_pins: i2c_ao_sda {mux {groups = "i2c_ao_sda";function = "i2c_ao";bias-disable;drive-strength-microamp = <3000>;};};i2c_ao_sck_e_pins: i2c_ao_sck_e {mux {groups = "i2c_ao_sck_e";function = "i2c_ao";bias-disable;drive-strength-microamp = <3000>;};};i2c_ao_sda_e_pins: i2c_ao_sda_e {mux {groups = "i2c_ao_sda_e";function = "i2c_ao";bias-disable;drive-strength-microamp = <3000>;};};mclk0_ao_pins: mclk0-ao {mux {groups = "mclk0_ao";function = "mclk0_ao";bias-disable;drive-strength-microamp = <3000>;};};tdm_ao_b_din0_pins: tdm-ao-b-din0 {mux {groups = "tdm_ao_b_din0";function = "tdm_ao_b";bias-disable;};};spdif_ao_out_pins: spdif-ao-out {mux {groups = "spdif_ao_out";function = "spdif_ao_out";drive-strength-microamp = <500>;bias-disable;};};tdm_ao_b_din1_pins: tdm-ao-b-din1 {mux {groups = "tdm_ao_b_din1";function = "tdm_ao_b";bias-disable;};};tdm_ao_b_din2_pins: tdm-ao-b-din2 {mux {groups = "tdm_ao_b_din2";function = "tdm_ao_b";bias-disable;};};tdm_ao_b_dout0_pins: tdm-ao-b-dout0 {mux {groups = "tdm_ao_b_dout0";function = "tdm_ao_b";bias-disable;drive-strength-microamp = <3000>;};};tdm_ao_b_dout1_pins: tdm-ao-b-dout1 {mux {groups = "tdm_ao_b_dout1";function = "tdm_ao_b";bias-disable;drive-strength-microamp = <3000>;};};tdm_ao_b_dout2_pins: tdm-ao-b-dout2 {mux {groups = "tdm_ao_b_dout2";function = "tdm_ao_b";bias-disable;drive-strength-microamp = <3000>;};};tdm_ao_b_fs_pins: tdm-ao-b-fs {mux {groups = "tdm_ao_b_fs";function = "tdm_ao_b";bias-disable;drive-strength-microamp = <3000>;};};tdm_ao_b_sclk_pins: tdm-ao-b-sclk {mux {groups = "tdm_ao_b_sclk";function = "tdm_ao_b";bias-disable;drive-strength-microamp = <3000>;};};tdm_ao_b_slv_fs_pins: tdm-ao-b-slv-fs {mux {groups = "tdm_ao_b_slv_fs";function = "tdm_ao_b";bias-disable;};};tdm_ao_b_slv_sclk_pins: tdm-ao-b-slv-sclk {mux {groups = "tdm_ao_b_slv_sclk";function = "tdm_ao_b";bias-disable;};};uart_ao_a_pins: uart-a-ao { mux { groups = "uart_ao_a_tx",@@ -418,6 +2012,69 @@ bias-disable; }; };
pwm_ao_a_pins: pwm-ao-a {mux {groups = "pwm_ao_a";function = "pwm_ao_a";bias-disable;};};pwm_ao_b_pins: pwm-ao-b {mux {groups = "pwm_ao_b";function = "pwm_ao_b";bias-disable;};};pwm_ao_c_4_pins: pwm-ao-c-4 {mux {groups = "pwm_ao_c_4";function = "pwm_ao_c";bias-disable;};};pwm_ao_c_6_pins: pwm-ao-c-6 {mux {groups = "pwm_ao_c_6";function = "pwm_ao_c";bias-disable;};};pwm_ao_d_5_pins: pwm-ao-d-5 {mux {groups = "pwm_ao_d_5";function = "pwm_ao_d";bias-disable;};};pwm_ao_d_10_pins: pwm-ao-d-10 {mux {groups = "pwm_ao_d_10";function = "pwm_ao_d";bias-disable;};};pwm_ao_d_e_pins: pwm-ao-d-e {mux {groups = "pwm_ao_d_e";function = "pwm_ao_d";};};remote_input_ao_pins: remote-input-ao {mux {groups = "remote_ao_input";function = "remote_ao_input";bias-disable;};}; }; };@@ -445,12 +2102,19 @@ status = "disabled"; };
pwm_AO_cd: pwm@2000 {compatible = "amlogic,meson-g12a-ao-pwm-cd";reg = <0x0 0x2000 0x0 0x20>;#pwm-cells = <3>;status = "disabled";};uart_AO: serial@3000 { compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x3000 0x0 0x18>; interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>, <&xtal>, <&xtal>;
clocks = <&xtal>, <&clkc_AO CLKID_AO_UART>, <&xtal>; clock-names = "xtal", "pclk", "baud"; status = "disabled"; };@@ -460,11 +2124,35 @@ "amlogic,meson-ao-uart"; reg = <0x0 0x4000 0x0 0x18>; interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>, <&xtal>, <&xtal>;
clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>; clock-names = "xtal", "pclk", "baud"; status = "disabled"; };i2c_AO: i2c@5000 {compatible = "amlogic,meson-axg-i2c";status = "disabled";reg = <0x0 0x05000 0x0 0x20>;interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;#address-cells = <1>;#size-cells = <0>;clocks = <&clkc CLKID_I2C>;};pwm_AO_ab: pwm@7000 {compatible = "amlogic,meson-g12a-ao-pwm-ab";reg = <0x0 0x7000 0x0 0x20>;#pwm-cells = <3>;status = "disabled";};ir: ir@8000 {compatible = "amlogic,meson-gxbb-ir";reg = <0x0 0x8000 0x0 0x20>;interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;status = "disabled";};saradc: adc@9000 { compatible = "amlogic,meson-g12a-saradc", "amlogic,meson-saradc";@@ -533,6 +2221,76 @@ #reset-cells = <1>; };
gpio_intc: interrupt-controller@f080 {compatible = "amlogic,meson-g12a-gpio-intc","amlogic,meson-gpio-intc";reg = <0x0 0xf080 0x0 0x10>;interrupt-controller;#interrupt-cells = <2>;amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;};pwm_ef: pwm@19000 {compatible = "amlogic,meson-g12a-ee-pwm";reg = <0x0 0x19000 0x0 0x20>;#pwm-cells = <3>;status = "disabled";};pwm_cd: pwm@1a000 {compatible = "amlogic,meson-g12a-ee-pwm";reg = <0x0 0x1a000 0x0 0x20>;#pwm-cells = <3>;status = "disabled";};pwm_ab: pwm@1b000 {compatible = "amlogic,meson-g12a-ee-pwm";reg = <0x0 0x1b000 0x0 0x20>;#pwm-cells = <3>;status = "disabled";};i2c3: i2c@1c000 {compatible = "amlogic,meson-axg-i2c";status = "disabled";reg = <0x0 0x1c000 0x0 0x20>;interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;#address-cells = <1>;#size-cells = <0>;clocks = <&clkc CLKID_I2C>;};i2c2: i2c@1d000 {compatible = "amlogic,meson-axg-i2c";status = "disabled";reg = <0x0 0x1d000 0x0 0x20>;interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;#address-cells = <1>;#size-cells = <0>;clocks = <&clkc CLKID_I2C>;};i2c1: i2c@1e000 {compatible = "amlogic,meson-axg-i2c";status = "disabled";reg = <0x0 0x1e000 0x0 0x20>;interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;#address-cells = <1>;#size-cells = <0>;clocks = <&clkc CLKID_I2C>;};i2c0: i2c@1f000 {compatible = "amlogic,meson-axg-i2c";status = "disabled";reg = <0x0 0x1f000 0x0 0x20>;interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;#address-cells = <1>;#size-cells = <0>;clocks = <&clkc CLKID_I2C>;};clk_msr: clock-measure@18000 { compatible = "amlogic,meson-g12a-clk-measure"; reg = <0x0 0x18000 0x0 0x10>;@@ -566,6 +2324,43 @@ }; };
sd_emmc_a: sd@ffe03000 {compatible = "amlogic,meson-axg-mmc";reg = <0x0 0xffe03000 0x0 0x800>;interrupts = <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;status = "disabled";clocks = <&clkc CLKID_SD_EMMC_A>,<&clkc CLKID_SD_EMMC_A_CLK0>,<&clkc CLKID_FCLK_DIV2>;clock-names = "core", "clkin0", "clkin1";resets = <&reset RESET_SD_EMMC_A>;amlogic,dram-access-quirk;};sd_emmc_b: sd@ffe05000 {compatible = "amlogic,meson-axg-mmc";reg = <0x0 0xffe05000 0x0 0x800>;interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;status = "disabled";clocks = <&clkc CLKID_SD_EMMC_B>,<&clkc CLKID_SD_EMMC_B_CLK0>,<&clkc CLKID_FCLK_DIV2>;clock-names = "core", "clkin0", "clkin1";resets = <&reset RESET_SD_EMMC_B>;};sd_emmc_c: mmc@ffe07000 {compatible = "amlogic,meson-axg-mmc";reg = <0x0 0xffe07000 0x0 0x800>;interrupts = <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>;status = "disabled";clocks = <&clkc CLKID_SD_EMMC_C>,<&clkc CLKID_SD_EMMC_C_CLK0>,<&clkc CLKID_FCLK_DIV2>;clock-names = "core", "clkin0", "clkin1";resets = <&reset RESET_SD_EMMC_C>;};- usb: usb@ffe09000 { status = "disabled"; compatible = "amlogic,meson-g12a-usb-ctrl";
diff --git a/include/dt-bindings/clock/axg-aoclkc.h b/include/dt-bindings/clock/axg-aoclkc.h index 61955016a5..8ec4a269c7 100644 --- a/include/dt-bindings/clock/axg-aoclkc.h +++ b/include/dt-bindings/clock/axg-aoclkc.h @@ -21,6 +21,11 @@ #define CLKID_AO_SAR_ADC_SEL 8 #define CLKID_AO_SAR_ADC_DIV 9 #define CLKID_AO_SAR_ADC_CLK 10 -#define CLKID_AO_ALT_XTAL 11 +#define CLKID_AO_CTS_OSCIN 11 +#define CLKID_AO_32K_PRE 12 +#define CLKID_AO_32K_DIV 13 +#define CLKID_AO_32K_SEL 14 +#define CLKID_AO_32K 15 +#define CLKID_AO_CTS_RTC_OSCIN 16
#endif diff --git a/include/dt-bindings/clock/axg-audio-clkc.h b/include/dt-bindings/clock/axg-audio-clkc.h index fd9c362099..75901c6368 100644 --- a/include/dt-bindings/clock/axg-audio-clkc.h +++ b/include/dt-bindings/clock/axg-audio-clkc.h @@ -7,26 +7,6 @@ #ifndef __AXG_AUDIO_CLKC_BINDINGS_H #define __AXG_AUDIO_CLKC_BINDINGS_H
-#define AUD_CLKID_SLV_SCLK0 9 -#define AUD_CLKID_SLV_SCLK1 10 -#define AUD_CLKID_SLV_SCLK2 11 -#define AUD_CLKID_SLV_SCLK3 12 -#define AUD_CLKID_SLV_SCLK4 13 -#define AUD_CLKID_SLV_SCLK5 14 -#define AUD_CLKID_SLV_SCLK6 15 -#define AUD_CLKID_SLV_SCLK7 16 -#define AUD_CLKID_SLV_SCLK8 17 -#define AUD_CLKID_SLV_SCLK9 18 -#define AUD_CLKID_SLV_LRCLK0 19 -#define AUD_CLKID_SLV_LRCLK1 20 -#define AUD_CLKID_SLV_LRCLK2 21 -#define AUD_CLKID_SLV_LRCLK3 22 -#define AUD_CLKID_SLV_LRCLK4 23 -#define AUD_CLKID_SLV_LRCLK5 24 -#define AUD_CLKID_SLV_LRCLK6 25 -#define AUD_CLKID_SLV_LRCLK7 26 -#define AUD_CLKID_SLV_LRCLK8 27 -#define AUD_CLKID_SLV_LRCLK9 28 #define AUD_CLKID_DDR_ARB 29 #define AUD_CLKID_PDM 30 #define AUD_CLKID_TDMIN_A 31 @@ -90,5 +70,15 @@ #define AUD_CLKID_TDMOUT_A_LRCLK 134 #define AUD_CLKID_TDMOUT_B_LRCLK 135 #define AUD_CLKID_TDMOUT_C_LRCLK 136 +#define AUD_CLKID_SPDIFOUT_B 151 +#define AUD_CLKID_SPDIFOUT_B_CLK 152 +#define AUD_CLKID_TDM_MCLK_PAD0 155 +#define AUD_CLKID_TDM_MCLK_PAD1 156 +#define AUD_CLKID_TDM_LRCLK_PAD0 157 +#define AUD_CLKID_TDM_LRCLK_PAD1 158 +#define AUD_CLKID_TDM_LRCLK_PAD2 159 +#define AUD_CLKID_TDM_SCLK_PAD0 160 +#define AUD_CLKID_TDM_SCLK_PAD1 161 +#define AUD_CLKID_TDM_SCLK_PAD2 162
#endif /* __AXG_AUDIO_CLKC_BINDINGS_H */ diff --git a/include/dt-bindings/clock/g12a-clkc.h b/include/dt-bindings/clock/g12a-clkc.h index 82c9e0c020..b6b127e456 100644 --- a/include/dt-bindings/clock/g12a-clkc.h +++ b/include/dt-bindings/clock/g12a-clkc.h @@ -130,11 +130,12 @@ #define CLKID_MALI_1_SEL 172 #define CLKID_MALI_1 174 #define CLKID_MALI 175 -#define CLKID_MPLL_5OM 177 +#define CLKID_MPLL_50M 177 #define CLKID_CPU_CLK 187 #define CLKID_PCIE_PLL 201 #define CLKID_VDEC_1 204 #define CLKID_VDEC_HEVC 207 #define CLKID_VDEC_HEVCF 210 +#define CLKID_TS 212
#endif /* __G12A_CLKC_H */
Applied to u-boot-amlogic
Neil