This patch adds support for noncached_alloc() which was only supported by ARM platform.
Unlike the ARM platform, MMU is not used in u-boot for MIPS. Instead, KSEG is provided to access uncached memory. So most code of this patch is copied from cache.c of ARM platform, with only two differences: 1. MMU is untouched in noncached_set_region() 2. Address returned by noncached_alloc() is converted using KSEG1ADDR()
Reviewed-by: Daniel Schwierzeck daniel.schwierzeck@gmail.com Signed-off-by: Weijie Gao weijie.gao@mediatek.com --- v6 changes: none v5 changes: change KSEG1ADDR to CKSEG1ADDR v4 changes: new --- arch/mips/include/asm/system.h | 20 ++++++++++++++++ arch/mips/lib/cache.c | 43 ++++++++++++++++++++++++++++++++++ 2 files changed, 63 insertions(+)
diff --git a/arch/mips/include/asm/system.h b/arch/mips/include/asm/system.h index 79e638844b..89a2ac209f 100644 --- a/arch/mips/include/asm/system.h +++ b/arch/mips/include/asm/system.h @@ -282,4 +282,24 @@ static inline void instruction_hazard_barrier(void) : "=&r"(tmp)); }
+#ifdef CONFIG_SYS_NONCACHED_MEMORY +/* 1MB granularity */ +#define MMU_SECTION_SHIFT 20 +#define MMU_SECTION_SIZE (1 << MMU_SECTION_SHIFT) + +/** + * noncached_init() - Initialize non-cached memory region + * + * Initialize non-cached memory area. This memory region will be typically + * located right below the malloc() area and be accessed from KSEG1. + * + * It is called during the generic post-relocation init sequence. + * + * Return: 0 if OK + */ +int noncached_init(void); + +phys_addr_t noncached_alloc(size_t size, size_t align); +#endif /* CONFIG_SYS_NONCACHED_MEMORY */ + #endif /* _ASM_SYSTEM_H */ diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c index ec652f0fba..d23b38d6b9 100644 --- a/arch/mips/lib/cache.c +++ b/arch/mips/lib/cache.c @@ -6,6 +6,7 @@
#include <common.h> #include <cpu_func.h> +#include <malloc.h> #include <asm/cache.h> #include <asm/cacheops.h> #include <asm/cm.h> @@ -197,3 +198,45 @@ void dcache_disable(void) /* ensure the pipeline doesn't contain now-invalid instructions */ instruction_hazard_barrier(); } + +#ifdef CONFIG_SYS_NONCACHED_MEMORY +static unsigned long noncached_start; +static unsigned long noncached_end; +static unsigned long noncached_next; + +void noncached_set_region(void) +{ +} + +int noncached_init(void) +{ + phys_addr_t start, end; + size_t size; + + /* If this calculation changes, update board_f.c:reserve_noncached() */ + end = ALIGN(mem_malloc_start, MMU_SECTION_SIZE) - MMU_SECTION_SIZE; + size = ALIGN(CONFIG_SYS_NONCACHED_MEMORY, MMU_SECTION_SIZE); + start = end - size; + + debug("mapping memory %pa-%pa non-cached\n", &start, &end); + + noncached_start = start; + noncached_end = end; + noncached_next = start; + + return 0; +} + +phys_addr_t noncached_alloc(size_t size, size_t align) +{ + phys_addr_t next = ALIGN(noncached_next, align); + + if (next >= noncached_end || (noncached_end - next) < size) + return 0; + + debug("allocated %zu bytes of uncached memory @%pa\n", size, &next); + noncached_next = next + size; + + return CKSEG1ADDR(next); +} +#endif /* CONFIG_SYS_NONCACHED_MEMORY */