On Thu, 2014-06-12 at 12:14 +0530, Prabhakar Kushwaha wrote:
IFC controller v1.1.0 requires internal SRAM initialize by reading NAND flash. Higher controller versions have provided "SRAM init" bit in NCFGR register space.
update SRAM initialize logic to reflect the same.
Also print error message in case of Page read error.
Signed-off-by: Prabhakar Kushwaha prabhakar@freescale.com
Changes for v2:
- Updated error handling
drivers/mtd/nand/fsl_ifc_nand.c | 35 +++++++++++++++++++++++++++++++---- include/fsl_ifc.h | 2 ++ 2 files changed, 33 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c index 27f5177..280e14e 100644 --- a/drivers/mtd/nand/fsl_ifc_nand.c +++ b/drivers/mtd/nand/fsl_ifc_nand.c @@ -806,12 +806,30 @@ static void fsl_ifc_select_chip(struct mtd_info *mtd, int chip) { }
-static void fsl_ifc_sram_init(void) +static int fsl_ifc_sram_init(uint32_t ver) { struct fsl_ifc *ifc = ifc_ctrl->regs; uint32_t cs = 0, csor = 0, csor_8k = 0, csor_ext = 0;
uint32_t ncfgr = 0; long long end_tick;
if (ver > FSL_IFC_V1_1_0) {
It would be better to check that ver >= the first version that supports this, rather than > the last version that doesn't.
How much benefit is there in doing this versus continuing with the current code?
Should we determine the IFC version at compile time instead, so that we don't need to carry around both versions of the code in the binary?
-Scott