
On Wednesday, September 23, 2015 at 12:30:34 PM, Jagan Teki wrote:
On 23 September 2015 at 15:43, Marek Vasut marex@denx.de wrote:
On Wednesday, September 23, 2015 at 12:11:20 PM, Jagan Teki wrote:
On 11 September 2015 at 23:58, Vikas Manocha vikas.manocha@st.com wrote:
Indirect read/write start addresses are flash start addresses for indirect read or write transfers. These should be absolute flash addresses instead of offsets.
Signed-off-by: Vikas Manocha vikas.manocha@st.com
Reviewed-by: Jagan Teki jteki@openedev.com
Changes in v6: none Changes in v5: fixed type cast compilation warnings. Changes in v4: removed extra type casts. Changes in v3: none Changes in v2: Rebased to master
drivers/spi/cadence_qspi_apb.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index d377ad1..c5b14c5 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -705,7 +705,8 @@ int cadence_qspi_apb_indirect_read_setup(struct cadence_spi_platdata *plat,
/* Get address */ addr_value = cadence_qspi_apb_cmd2addr(&cmdbuf[1], addr_bytes);
writel(addr_value, plat->regbase +
CQSPI_REG_INDIRECTRDSTARTADDR); + writel((u32)plat->ahbbase + addr_value,
plat->regbase + CQSPI_REG_INDIRECTRDSTARTADDR); /* The remaining lenght is dummy bytes. */ dummy_bytes = cmdlen - addr_bytes - 1;
@@ -795,7 +796,8 @@ int cadence_qspi_apb_indirect_write_setup(struct cadence_spi_platdata *plat,
/* Setup write address. */ reg = cadence_qspi_apb_cmd2addr(&cmdbuf[1], addr_bytes);
writel(reg, plat->regbase + CQSPI_REG_INDIRECTWRSTARTADDR);
writel((u32)plat->ahbbase + reg,
Jagan, is introducing ad-hoc typecasts to suppress warnings OK with you ?
I think there are few ad-hoc typecasts similar to were there in the driver, do you have any other thoughts?
Yes, for example -- fix the few, then add new features. Adding more just because there were some before is a totally shitty approach.
Best regards, Marek Vasut