After the commit: "eth: dm: fec: Add gpio phy reset binding" SHA1: efd0b791069af93e9d439a70d1fe2ae8994dbbfa
The FEC ETH driver switched to PHY GPIO reset performed with data defined in DTS. For the HSC|DDC boards the GPIO reset signal is active low and hence the wrong DTS description must be changed (otherwise the reset for ETH is not properly setup).
Signed-off-by: Lukasz Majewski lukma@denx.de --- arch/arm/dts/imx53-kp.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/imx53-kp.dts b/arch/arm/dts/imx53-kp.dts index d3018f32b3..3ce4445c18 100644 --- a/arch/arm/dts/imx53-kp.dts +++ b/arch/arm/dts/imx53-kp.dts @@ -23,7 +23,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_eth>; phy-mode = "rmii"; - phy-reset-gpios = <&gpio7 6 0>; + phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; status = "okay"; };