On 13:57 Fri 24 Apr , Remco Poelstra wrote:
This patch includes support for the LPC2468 processor from NXP.
Signed-off-by: Remco Poelstra remco.poelstra+u-boot@duran-audio.com
A working board example will be submitted when this patch is found to be OK. This patch is against latest git. The previous problem with PUTx vs. writex is solved.
two general news
I'm preparing some patch to cleanup the arm720t include LPC irq support
I'll send it asap
please take a look and test it
From 75361079ed78fb40c2840b3bd74687153e486620 Mon Sep 17 00:00:00 2001 From: Remco Poelstra remco.poelstra+u-boot@duran-audio.com Date: Fri, 24 Apr 2009 12:18:21 +0200 Subject: [PATCH] Support for LPC2468 processor from NXP
Makefile | 3 + cpu/arm720t/cpu.c | 2 +- cpu/arm720t/interrupts.c | 37 +++- cpu/arm720t/lpc24xx/Makefile | 50 +++++ cpu/arm720t/lpc24xx/flash.c | 233 ++++++++++++++++++++ cpu/arm720t/lpc24xx/iap_entry.S | 7 + cpu/arm720t/start.S | 11 +- drivers/serial/Makefile | 1 + drivers/serial/serial_lpc2468.c | 119 +++++++++++ include/asm-arm/arch-lpc24xx/hardware.h | 32 +++ include/asm-arm/arch-lpc24xx/immap.h | 351 +++++++++++++++++++++++++++++++ include/asm-arm/config.h | 4 + include/flash.h | 1 + 13 files changed, 842 insertions(+), 9 deletions(-) create mode 100644 cpu/arm720t/lpc24xx/Makefile create mode 100644 cpu/arm720t/lpc24xx/flash.c create mode 100644 cpu/arm720t/lpc24xx/iap_entry.S create mode 100644 drivers/serial/serial_lpc2468.c create mode 100644 include/asm-arm/arch-lpc24xx/hardware.h create mode 100644 include/asm-arm/arch-lpc24xx/immap.h
diff --git a/Makefile b/Makefile index e91c051..fb23ee6 100644 --- a/Makefile +++ b/Makefile @@ -2940,6 +2940,9 @@ B2_config : unconfig ## ARM720T Systems #########################################################################
+LPC2468_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm arm720t LPC2468 NULL lpc24xx
- armadillo_config: unconfig @$(MKCONFIG) $(@:_config=) arm arm720t armadillo
diff --git a/cpu/arm720t/cpu.c b/cpu/arm720t/cpu.c index 6c40903..b3a2853 100644 --- a/cpu/arm720t/cpu.c +++ b/cpu/arm720t/cpu.c @@ -75,7 +75,7 @@ int cleanup_before_linux (void) /* go to high speed */ IO_SYSCON3 = (IO_SYSCON3 & ~CLKCTL) | CLKCTL_73; #endif -#elif defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) || defined(CONFIG_LPC2292) +#elif defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) || defined(CONFIG_LPC2000) disable_interrupts (); /* Nothing more needed */ #elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR) diff --git a/cpu/arm720t/interrupts.c b/cpu/arm720t/interrupts.c index 39ed345..d7aec27 100644 --- a/cpu/arm720t/interrupts.c +++ b/cpu/arm720t/interrupts.c @@ -29,17 +29,26 @@ #include <common.h> #include <clps7111.h> #include <asm/proc-armv/ptrace.h> +#include <asm/io.h> +#if defined(CONFIG_LPC2468) +#include <asm/arch/immap.h> +#else #include <asm/hardware.h> +#endif
#ifndef CONFIG_NETARM
+#if defined(CONFIG_LPC2292) +#define TIMER_LOAD_VAL 0xffff +#define READ_TIMER (0xFFFFFFFF - GET32(T0TC)) +#elif defined(CONFIG_LPC2468) +#define TIMER_LOAD_VAL 0 +#define READ_TIMER (0xFFFFFFFF - 0xE0004008) +#else /* we always count down the max. */ #define TIMER_LOAD_VAL 0xffff /* macro to read the 16 bit timer */ #define READ_TIMER (IO_TC1D & 0xffff)
-#ifdef CONFIG_LPC2292 -#undef READ_TIMER -#define READ_TIMER (0xFFFFFFFF - GET32(T0TC)) #endif
#else @@ -80,6 +89,14 @@ void do_irq (struct pt_regs *pt_regs) pfnct = (void (*)(void))VICVectAddr;
(*pfnct)();+#elif defined(CONFIG_LPC2468)
- void (*pfnct) (void);
- vic_2468_t *vic = &(((immap_t *)CONFIG_SYS_IMMAP)->ahb.vic);
- pfnct = (void (*)(void))(&(vic->vicaddr));
- (*pfnct) ();
- #else #error do_irq() not defined for this CPU type #endif
@@ -112,6 +129,9 @@ static ulong lastdec;
int interrupt_init (void) { +#if defined(CONFIG_LPC2468)
- timer_2468_t *timer0=&(((immap_t *)CONFIG_SYS_IMMAP)->apb.timer0);
+#endif
#if defined(CONFIG_NETARM) /* disable all interrupts */ @@ -185,6 +205,13 @@ int interrupt_init (void) PUT32(T0MCR, 0); PUT32(T0TC, 0); PUT32(T0TCR, 1); /* enable timer0 */ +#elif defined(CONFIG_LPC2468)
writel (0, &(timer0->ir)); /*disable all timer0 interupts */
writel (0, &(timer0->tcr)); /*disable timer0 */
writel (CFG_SYS_CLK_FREQ / CONFIG_SYS_HZ - 1, &(timer0->pr));
writel (0, &(timer0->mcr));
writel (0, &(timer0->tc));
writel (1, &(timer0->tcr));
#else #error No interrupt_init() defined for this CPU type
@@ -201,7 +228,7 @@ int interrupt_init (void) */
-#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) || defined(CONFIG_ARMADILLO) || defined(CONFIG_LPC2292) +#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) || defined(CONFIG_ARMADILLO) || defined(CONFIG_LPC2000)
void reset_timer (void) { diff --git a/cpu/arm720t/lpc24xx/Makefile b/cpu/arm720t/lpc24xx/Makefile new file mode 100644 index 0000000..f091502 --- /dev/null +++ b/cpu/arm720t/lpc24xx/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2000-2007 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +#
+include $(TOPDIR)/config.mk
+LIB = $(obj)lib$(SOC).a
+COBJS = flash.o +SOBJS = $(obj)iap_entry.o
+SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS))
+all: $(obj).depend $(LIB)
+$(LIB): $(OBJS) $(SOBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+# this MUST be compiled as thumb code!
why? no thumb will be accpeted without a clear explination
+$(SOBJS):
- $(CC) $(AFLAGS) -march=armv4t -c -o $(SOBJS) iap_entry.S
+#########################################################################
+# defines $(obj).depend target +include $(SRCTREE)/rules.mk
+sinclude $(obj).depend
+######################################################################### diff --git a/cpu/arm720t/lpc24xx/flash.c b/cpu/arm720t/lpc24xx/flash.c new file mode 100644 index 0000000..46a1a56 --- /dev/null +++ b/cpu/arm720t/lpc24xx/flash.c @@ -0,0 +1,233 @@ +/*
- (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com>
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <common.h> +#include <asm/io.h> +#include <asm/arch/immap.h> +/* IAP commands use 32 bytes at the top of CPU internal sram, we
- use 512 bytes below that */
please use this style of comment /* * */
+#define COPY_BUFFER_LOCATION 0x4000fde0
evenif it's soc specific flash support I think they need to be store with the other flash and need to have the ack of Stefan
+#define IAP_LOCATION 0x7ffffff1 +#define IAP_CMD_PREPARE 50 +#define IAP_CMD_COPY 51 +#define IAP_CMD_ERASE 52 +#define IAP_CMD_CHECK 53 +#define IAP_CMD_ID 54 +#define IAP_CMD_VERSION 55 +#define IAP_CMD_COMPARE 56
diff --git a/cpu/arm720t/start.S b/cpu/arm720t/start.S index 022b873..eca4d9f 100644 --- a/cpu/arm720t/start.S +++ b/cpu/arm720t/start.S @@ -127,7 +127,7 @@ reset: bl cpu_init_crit #endif
-#ifdef CONFIG_LPC2292 +#if defined(CONFIG_LPC2000) bl lowlevel_init #endif
I'm not really happy with this we need to extract the soc specific from the arch init
@@ -368,6 +368,11 @@ lock_loop: ldr r0, VPBDIV_ADR mov r1, #0x01 /* VPB clock is same as process clock */ str r1, [r0] +#elif defined(CONFIG_LPC2468)
- ldr r0, =0x40008000 /*0x40000000 is internal SRAM,
0x4000FFFF is end of SRAM*/- mov sp,r0
- sub sl,sp,#0x2000 #else #error No cpu_init_crit() defined for current CPU type #endif
@@ -383,7 +388,7 @@ lock_loop: str r1, [r0] #endif
-#ifndef CONFIG_LPC2292 +#if !defined(CONFIG_LPC2000) mov ip, lr /* * before relocating, we have to setup RAM timing @@ -601,7 +606,7 @@ reset_cpu:
- on external peripherals such as watchdog timers, etc. */
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR) /* No specific reset actions for IntegratorAP/CM720T as yet */ -#elif defined(CONFIG_LPC2292) +#elif defined(CONFIG_LPC2000) .align 5 .globl reset_cpu reset_cpu: diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index bb99a34..929fb5a 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -39,6 +39,7 @@ COBJS-$(CONFIG_IMX_SERIAL) += serial_imx.o COBJS-$(CONFIG_IXP_SERIAL) += serial_ixp.o COBJS-$(CONFIG_KS8695_SERIAL) += serial_ks8695.o COBJS-$(CONFIG_LPC2292_SERIAL) += serial_lpc2292.o +COBJS-$(CONFIG_LPC2468_SERIAL) += serial_lpc2468.o COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o COBJS-$(CONFIG_MX31_UART) += serial_mx31.o COBJS-$(CONFIG_NETARM_SERIAL) += serial_netarm.o
Best Regards, J.