Also update dmacpy()'s argument order and type to match memcpy's for clarity
Signed-off-by: Peter Tyser ptyser@xes-inc.com --- board/mpc8540eval/mpc8540eval.c | 22 +++++++++++----------- board/sbc8560/sbc8560.c | 22 +++++++++++----------- cpu/mpc83xx/cpu.c | 4 ++-- cpu/mpc83xx/spd_sdram.c | 24 ++++++++++++------------ cpu/mpc85xx/ddr-gen1.c | 24 ++++++++++++------------ drivers/dma/fsl_dma.c | 12 ++++++------ 6 files changed, 54 insertions(+), 54 deletions(-)
diff --git a/board/mpc8540eval/mpc8540eval.c b/board/mpc8540eval/mpc8540eval.c index 72a1ad3..3d395c6 100644 --- a/board/mpc8540eval/mpc8540eval.c +++ b/board/mpc8540eval/mpc8540eval.c @@ -148,28 +148,28 @@ phys_size_t initdram (int board_type) }
/* 8K */ - dma_xfer((uint *)0x2000,0x2000,(uint *)0); + dmacpy((uint *)0x2000, (uint *)0, 0x2000); /* 16K */ - dma_xfer((uint *)0x4000,0x4000,(uint *)0); + dmacpy((uint *)0x4000, (uint *)0, 0x4000); /* 32K */ - dma_xfer((uint *)0x8000,0x8000,(uint *)0); + dmacpy((uint *)0x8000, (uint *)0, 0x8000); /* 64K */ - dma_xfer((uint *)0x10000,0x10000,(uint *)0); + dmacpy((uint *)0x10000, (uint *)0, 0x10000); /* 128k */ - dma_xfer((uint *)0x20000,0x20000,(uint *)0); + dmacpy((uint *)0x20000, (uint *)0, 0x20000); /* 256k */ - dma_xfer((uint *)0x40000,0x40000,(uint *)0); + dmacpy((uint *)0x40000, (uint *)0, 0x40000); /* 512k */ - dma_xfer((uint *)0x80000,0x80000,(uint *)0); + dmacpy((uint *)0x80000, (uint *)0, 0x80000); /* 1M */ - dma_xfer((uint *)0x100000,0x100000,(uint *)0); + dmacpy((uint *)0x100000, (uint *)0, 0x100000); /* 2M */ - dma_xfer((uint *)0x200000,0x200000,(uint *)0); + dmacpy((uint *)0x200000, (uint *)0, 0x200000); /* 4M */ - dma_xfer((uint *)0x400000,0x400000,(uint *)0); + dmacpy((uint *)0x400000, (uint *)0, 0x400000);
for (i = 1; i < dram_size / 0x800000; i++) { - dma_xfer((uint *)(0x800000*i),0x800000,(uint *)0); + dmacpy((uint *)(0x800000*i), (uint *)0, 0x800000); }
/* Enable errors for ECC */ diff --git a/board/sbc8560/sbc8560.c b/board/sbc8560/sbc8560.c index 7f032c8..0b8e3e5 100644 --- a/board/sbc8560/sbc8560.c +++ b/board/sbc8560/sbc8560.c @@ -349,28 +349,28 @@ phys_size_t initdram (int board_type) }
/* 8K */ - dma_xfer((uint *)0x2000,0x2000,(uint *)0); + dmacpy((uint *)0x2000, (uint *)0, 0x2000); /* 16K */ - dma_xfer((uint *)0x4000,0x4000,(uint *)0); + dmacpy((uint *)0x4000, (uint *)0, 0x4000); /* 32K */ - dma_xfer((uint *)0x8000,0x8000,(uint *)0); + dmacpy((uint *)0x8000, (uint *)0, 0x8000); /* 64K */ - dma_xfer((uint *)0x10000,0x10000,(uint *)0); + dmacpy((uint *)0x10000, (uint *)0, 0x10000); /* 128k */ - dma_xfer((uint *)0x20000,0x20000,(uint *)0); + dmacpy((uint *)0x20000, (uint *)0, 0x20000); /* 256k */ - dma_xfer((uint *)0x40000,0x40000,(uint *)0); + dmacpy((uint *)0x40000, (uint *)0, 0x40000); /* 512k */ - dma_xfer((uint *)0x80000,0x80000,(uint *)0); + dmacpy((uint *)0x80000, (uint *)0, 0x80000); /* 1M */ - dma_xfer((uint *)0x100000,0x100000,(uint *)0); + dmacpy((uint *)0x100000, (uint *)0, 0x100000); /* 2M */ - dma_xfer((uint *)0x200000,0x200000,(uint *)0); + dmacpy((uint *)0x200000, (uint *)0, 0x200000); /* 4M */ - dma_xfer((uint *)0x400000,0x400000,(uint *)0); + dmacpy((uint *)0x400000, (uint *)0, 0x400000);
for (i = 1; i < dram_size / 0x800000; i++) { - dma_xfer((uint *)(0x800000*i),0x800000,(uint *)0); + dmacpy((uint *)(0x800000*i), (uint *)0, 0x800000); }
/* Enable errors for ECC */ diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c index 876f5c7..3b93a32 100644 --- a/cpu/mpc83xx/cpu.c +++ b/cpu/mpc83xx/cpu.c @@ -327,7 +327,7 @@ uint dma_check(void) return status; }
-int dma_xfer(void *dest, u32 count, void *src) +int dmacpy(void *dest, const void *src, size_t count) { volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile dma83xx_t *dma = &immap->dma; @@ -336,7 +336,7 @@ int dma_xfer(void *dest, u32 count, void *src) /* initialize DMASARn, DMADAR and DMAABCRn */ dma->dmadar0 = swab32((u32)dest); dma->dmasar0 = swab32((u32)src); - dma->dmabcr0 = swab32(count); + dma->dmabcr0 = swab32((u32)count);
__asm__ __volatile__ ("sync"); __asm__ __volatile__ ("isync"); diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c index 4704d20..12dad75 100644 --- a/cpu/mpc83xx/spd_sdram.c +++ b/cpu/mpc83xx/spd_sdram.c @@ -68,7 +68,7 @@ void board_add_ram_info(int use_default) #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC) extern void dma_init(void); extern uint dma_check(void); -extern int dma_xfer(void *dest, uint count, void *src); +extern int dmacpy(void *dest, const void *src, size_t n); #endif
#ifndef CONFIG_SYS_READ_SPD @@ -898,19 +898,19 @@ void ddr_enable_ecc(unsigned int dram_size) /* Initialise DMA for direct transfer */ dma_init(); /* Start DMA to transfer */ - dma_xfer((uint *)0x2000, 0x2000, (uint *)0); /* 8K */ - dma_xfer((uint *)0x4000, 0x4000, (uint *)0); /* 16K */ - dma_xfer((uint *)0x8000, 0x8000, (uint *)0); /* 32K */ - dma_xfer((uint *)0x10000, 0x10000, (uint *)0); /* 64K */ - dma_xfer((uint *)0x20000, 0x20000, (uint *)0); /* 128K */ - dma_xfer((uint *)0x40000, 0x40000, (uint *)0); /* 256K */ - dma_xfer((uint *)0x80000, 0x80000, (uint *)0); /* 512K */ - dma_xfer((uint *)0x100000, 0x100000, (uint *)0); /* 1M */ - dma_xfer((uint *)0x200000, 0x200000, (uint *)0); /* 2M */ - dma_xfer((uint *)0x400000, 0x400000, (uint *)0); /* 4M */ + dmacpy((uint *)0x2000, (uint *)0, 0x2000); /* 8K */ + dmacpy((uint *)0x4000, (uint *)0, 0x4000); /* 16K */ + dmacpy((uint *)0x8000, (uint *)0, 0x8000); /* 32K */ + dmacpy((uint *)0x10000, (uint *)0, 0x10000); /* 64K */ + dmacpy((uint *)0x20000, (uint *)0, 0x20000); /* 128K */ + dmacpy((uint *)0x40000, (uint *)0, 0x40000); /* 256K */ + dmacpy((uint *)0x80000, (uint *)0, 0x80000); /* 512K */ + dmacpy((uint *)0x100000, (uint *)0, 0x100000); /* 1M */ + dmacpy((uint *)0x200000, (uint *)0, 0x200000); /* 2M */ + dmacpy((uint *)0x400000, (uint *)0, 0x400000); /* 4M */
for (i = 1; i < dram_size / 0x800000; i++) { - dma_xfer((uint *)(0x800000*i), 0x800000, (uint *)0); + dmacpy((uint *)(0x800000*i), (uint *)0, 0x800000); } #endif
diff --git a/cpu/mpc85xx/ddr-gen1.c b/cpu/mpc85xx/ddr-gen1.c index e24c9af..7c7a458 100644 --- a/cpu/mpc85xx/ddr-gen1.c +++ b/cpu/mpc85xx/ddr-gen1.c @@ -68,7 +68,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) extern void dma_init(void); extern uint dma_check(void); -extern int dma_xfer(void *dest, uint count, void *src); +extern int dmacpy(void *dest, const void *src, size_t n);
/* * Initialize all of memory for ECC, then enable errors. @@ -93,19 +93,19 @@ ddr_enable_ecc(unsigned int dram_size) } }
- dma_xfer((uint *)0x002000, 0x002000, (uint *)0); /* 8K */ - dma_xfer((uint *)0x004000, 0x004000, (uint *)0); /* 16K */ - dma_xfer((uint *)0x008000, 0x008000, (uint *)0); /* 32K */ - dma_xfer((uint *)0x010000, 0x010000, (uint *)0); /* 64K */ - dma_xfer((uint *)0x020000, 0x020000, (uint *)0); /* 128k */ - dma_xfer((uint *)0x040000, 0x040000, (uint *)0); /* 256k */ - dma_xfer((uint *)0x080000, 0x080000, (uint *)0); /* 512k */ - dma_xfer((uint *)0x100000, 0x100000, (uint *)0); /* 1M */ - dma_xfer((uint *)0x200000, 0x200000, (uint *)0); /* 2M */ - dma_xfer((uint *)0x400000, 0x400000, (uint *)0); /* 4M */ + dmacpy((uint *)0x002000, (uint *)0, 0x2000); /* 8K */ + dmacpy((uint *)0x004000, (uint *)0, 0x4000); /* 16K */ + dmacpy((uint *)0x008000, (uint *)0, 0x8000); /* 32K */ + dmacpy((uint *)0x010000, (uint *)0, 0x10000); /* 64K */ + dmacpy((uint *)0x020000, (uint *)0, 0x20000); /* 128K */ + dmacpy((uint *)0x040000, (uint *)0, 0x40000); /* 256K */ + dmacpy((uint *)0x080000, (uint *)0, 0x80000); /* 512K */ + dmacpy((uint *)0x100000, (uint *)0, 0x100000); /* 1M */ + dmacpy((uint *)0x200000, (uint *)0, 0x200000); /* 2M */ + dmacpy((uint *)0x400000, (uint *)0, 0x400000); /* 4M */
for (i = 1; i < dram_size / 0x800000; i++) { - dma_xfer((uint *)(0x800000*i), 0x800000, (uint *)0); + dmacpy((uint *)(0x800000*i), (uint *)0, 0x800000); }
/* diff --git a/drivers/dma/fsl_dma.c b/drivers/dma/fsl_dma.c index d41f04c..90eeef7 100644 --- a/drivers/dma/fsl_dma.c +++ b/drivers/dma/fsl_dma.c @@ -78,15 +78,15 @@ void dma_init(void) { dma_sync(); }
-int dma_xfer(void *dest, uint count, void *src) { +int dmacpy(void *dest, const void *src, size_t n) { volatile fsl_dma_t *dma = &dma_base->dma[0]; uint xfer_size;
- while (count) { - xfer_size = MIN(FSL_DMA_MAX_SIZE, count); + while (n) { + xfer_size = MIN(FSL_DMA_MAX_SIZE, n);
- debug("count = 0x%x, xfer_size = 0x%x, src = %p, dest = %p\n", - count, xfer_size, src, dest); + debug("size = 0x%x, xfer_size = 0x%x, src = %p, dest = %p\n", + n, xfer_size, src, dest); out_be32(&dma->dar, (uint) dest); out_be32(&dma->sar, (uint) src); out_be32(&dma->bcr, xfer_size); @@ -100,7 +100,7 @@ int dma_xfer(void *dest, uint count, void *src) { FSL_DMA_MR_CTM_DIRECT | FSL_DMA_MR_CS);
- count -= xfer_size; + n -= xfer_size; src += xfer_size; dest += xfer_size;