This adds a driver to handle enabling the clock for the AI SRAM. This was previously done in board_init, but it needs to happen before relocation now. An alternative would be to move this to board_init_early_f, but by doing it this way we can use clk_bulk.
Signed-off-by: Sean Anderson seanga2@gmail.com Reviewed-by: Simon Glass sjg@chromium.org ---
(no changes since v1)
MAINTAINERS | 1 + drivers/ram/Kconfig | 7 ++++++ drivers/ram/Makefile | 1 + drivers/ram/kendryte.c | 56 ++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 65 insertions(+) create mode 100644 drivers/ram/kendryte.c
diff --git a/MAINTAINERS b/MAINTAINERS index fb9ba37984..166acb30c2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -938,6 +938,7 @@ F: doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt F: doc/device-tree-bindings/pinctrl/kendryte,k210-fpioa.txt F: drivers/clk/kendryte/ F: drivers/pinctrl/kendryte/ +F: drivers/ram/kendryte.c F: include/kendryte/
RNG diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig index a270e13b26..075e6b5cd7 100644 --- a/drivers/ram/Kconfig +++ b/drivers/ram/Kconfig @@ -73,6 +73,13 @@ config IMXRT_SDRAM to support external memories like sdram, psram & nand. This driver is for the sdram memory interface with the SEMC.
+config K210_SRAM + bool "Enable Kendryte K210 SRAM support" + depends on RAM + help + The Kendryte K210 has three banks of SRAM. This driver does the + necessary initialization. + source "drivers/ram/aspeed/Kconfig" source "drivers/ram/rockchip/Kconfig" source "drivers/ram/sifive/Kconfig" diff --git a/drivers/ram/Makefile b/drivers/ram/Makefile index 209a78c06f..fdc9bbeb1f 100644 --- a/drivers/ram/Makefile +++ b/drivers/ram/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_ARCH_ASPEED) += aspeed/ obj-$(CONFIG_K3_J721E_DDRSS) += k3-j721e/
obj-$(CONFIG_IMXRT_SDRAM) += imxrt_sdram.o +obj-$(CONFIG_K210_SRAM) += kendryte.o
obj-$(CONFIG_RAM_SIFIVE) += sifive/
diff --git a/drivers/ram/kendryte.c b/drivers/ram/kendryte.c new file mode 100644 index 0000000000..50818bf005 --- /dev/null +++ b/drivers/ram/kendryte.c @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Sean Anderson seanga2@gmail.com + */ + +#include <common.h> +#include <clk.h> +#include <dm.h> +#include <ram.h> + +static int k210_sram_probe(struct udevice *dev) +{ + int ret; + struct clk_bulk clocks; + + /* Relocate as high as possible to leave more space to load payloads */ + ret = fdtdec_setup_mem_size_base_highest(); + if (ret) + return ret; + + /* Enable ram bank clocks */ + ret = clk_get_bulk(dev, &clocks); + if (ret) + return ret; + + ret = clk_enable_bulk(&clocks); + if (ret) + return ret; + + return 0; +} + +static int k210_sram_get_info(struct udevice *dev, struct ram_info *info) +{ + info->base = gd->ram_base; + info->size = gd->ram_size; + + return 0; +} + +static struct ram_ops k210_sram_ops = { + .get_info = k210_sram_get_info, +}; + +static const struct udevice_id k210_sram_ids[] = { + { .compatible = "kendryte,k210-sram" }, + { } +}; + +U_BOOT_DRIVER(fu540_ddr) = { + .name = "k210_sram", + .id = UCLASS_RAM, + .of_match = k210_sram_ids, + .ops = &k210_sram_ops, + .probe = k210_sram_probe, +};