Signed-off-by: Wills Wang wills.wang@live.com ---
Changes in v4: None Changes in v3: None Changes in v2: None
arch/mips/Kconfig | 8 +++++ arch/mips/dts/Makefile | 2 +- arch/mips/dts/ap121.dts | 37 +++++++++++++++++++ arch/mips/dts/ar933x.dtsi | 64 +++++++++++++++++++++++++++++++++ board/ath79/ap121/Kconfig | 15 ++++++++ board/ath79/ap121/MAINTAINERS | 6 ++++ board/ath79/ap121/Makefile | 8 +++++ board/ath79/ap121/README | 18 ++++++++++ board/ath79/ap121/ap121.c | 17 +++++++++ board/ath79/ap121/config.mk | 16 +++++++++ configs/ap121_defconfig | 42 ++++++++++++++++++++++ include/configs/ap121.h | 82 +++++++++++++++++++++++++++++++++++++++++++ 12 files changed, 314 insertions(+), 1 deletion(-) create mode 100644 arch/mips/dts/ap121.dts create mode 100644 arch/mips/dts/ar933x.dtsi create mode 100644 board/ath79/ap121/Kconfig create mode 100644 board/ath79/ap121/MAINTAINERS create mode 100644 board/ath79/ap121/Makefile create mode 100644 board/ath79/ap121/README create mode 100644 board/ath79/ap121/ap121.c create mode 100644 board/ath79/ap121/config.mk create mode 100644 configs/ap121_defconfig create mode 100644 include/configs/ap121.h
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 7f7e258..09b8709 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -51,6 +51,13 @@ config TARGET_PB1X00 select SUPPORTS_CPU_MIPS32_R2 select SYS_MIPS_CACHE_INIT_RAM_LOAD
+config TARGET_AP121 + bool "Support ap121" + select SUPPORTS_BIG_ENDIAN + select SUPPORTS_CPU_MIPS32_R1 + select SUPPORTS_CPU_MIPS32_R2 + select SYS_MIPS_CACHE_INIT_RAM_LOAD +
endchoice
@@ -59,6 +66,7 @@ source "board/imgtec/malta/Kconfig" source "board/micronas/vct/Kconfig" source "board/pb1x00/Kconfig" source "board/qemu-mips/Kconfig" +source "board/ath79/ap121/Kconfig"
if MIPS
diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile index 47b6eb5..6f8b413 100644 --- a/arch/mips/dts/Makefile +++ b/arch/mips/dts/Makefile @@ -2,7 +2,7 @@ # SPDX-License-Identifier: GPL-2.0+ #
-dtb-y += +dtb-$(CONFIG_TARGET_AP121) += ap121.dtb
targets += $(dtb-y)
diff --git a/arch/mips/dts/ap121.dts b/arch/mips/dts/ap121.dts new file mode 100644 index 0000000..769458a --- /dev/null +++ b/arch/mips/dts/ap121.dts @@ -0,0 +1,37 @@ +/dts-v1/; +#include "ar933x.dtsi" + +/ { + model = "AP121 Reference Board"; + compatible = "ath79,ap121", "ath79,ar933x"; + + aliases { + spi0 = &spi0; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&xtal { + clock-frequency = <25000000>; +}; + +&uart0 { + status = "okay"; +}; + +&spi0 { + spi-max-frequency = <25000000>; + status = "okay"; + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + memory-map = <0x9f000000 0x00800000>; + spi-max-frequency = <25000000>; + reg = <0>; + }; +}; diff --git a/arch/mips/dts/ar933x.dtsi b/arch/mips/dts/ar933x.dtsi new file mode 100644 index 0000000..64b30f7 --- /dev/null +++ b/arch/mips/dts/ar933x.dtsi @@ -0,0 +1,64 @@ +#include "skeleton.dtsi" + +/ { + compatible = "ath79,ar933x"; + + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "mips,mips24Kc"; + reg = <0>; + }; + }; + + clocks { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + xtal: xtal { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-output-names = "xtal"; + }; + }; + + ahb { + compatible = "simple-bus"; + ranges; + + #address-cells = <1>; + #size-cells = <1>; + + apb { + compatible = "simple-bus"; + ranges; + + #address-cells = <1>; + #size-cells = <1>; + + uart0: uart@18020000 { + compatible = "ath79,ar933x-uart"; + reg = <0x18020000 0x20>; + + status = "disabled"; + }; + }; + + spi0: spi@1f000000 { + compatible = "ath79,ath79-spi"; + reg = <0x1f000000 0x10>; + + status = "disabled"; + + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; diff --git a/board/ath79/ap121/Kconfig b/board/ath79/ap121/Kconfig new file mode 100644 index 0000000..88d9eff --- /dev/null +++ b/board/ath79/ap121/Kconfig @@ -0,0 +1,15 @@ +if TARGET_AP121 + +config SYS_BOARD + default "ap121" + +config SYS_VENDOR + default "ath79" + +config SYS_SOC + default "ath79" + +config SYS_CONFIG_NAME + default "ap121" + +endif diff --git a/board/ath79/ap121/MAINTAINERS b/board/ath79/ap121/MAINTAINERS new file mode 100644 index 0000000..319b521 --- /dev/null +++ b/board/ath79/ap121/MAINTAINERS @@ -0,0 +1,6 @@ +AP121 BOARD +M: Wills Wang wills.wang@live.com +S: Maintained +F: board/ath79/ap121/ +F: include/configs/ap121.h +F: configs/ap121_defconfig diff --git a/board/ath79/ap121/Makefile b/board/ath79/ap121/Makefile new file mode 100644 index 0000000..9132118 --- /dev/null +++ b/board/ath79/ap121/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2003-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y = ap121.o diff --git a/board/ath79/ap121/README b/board/ath79/ap121/README new file mode 100644 index 0000000..104850f --- /dev/null +++ b/board/ath79/ap121/README @@ -0,0 +1,18 @@ +ATHEROS AP121 +================== + +Supported hardware: AP121 referance board. + +Files of the AP121 port +-------------------------- + +arch/mips/mach-ath79/ar933x/ - The CPU support code for the Atheros ar933x +arch/mips/include/asm/arch-ath79 - Header files for the Atheros ath79 +board/ath79/ap121/ - AP121 board specific files +include/configs/ap121.h - AP121 configuration file + +Configure +------------------- + +To configure for the current board + make ap121_defconfig diff --git a/board/ath79/ap121/ap121.c b/board/ath79/ap121/ap121.c new file mode 100644 index 0000000..f60f88b --- /dev/null +++ b/board/ath79/ap121/ap121.c @@ -0,0 +1,17 @@ +/* + * (C) Copyright 2015 + * Wills Wang, wills.wang@live.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <command.h> +#include <asm/mipsregs.h> +#include <asm/addrspace.h> +#include <asm/io.h> + +int checkboard(void) +{ + return 0; +} diff --git a/board/ath79/ap121/config.mk b/board/ath79/ap121/config.mk new file mode 100644 index 0000000..f7dd3b7 --- /dev/null +++ b/board/ath79/ap121/config.mk @@ -0,0 +1,16 @@ +# +# (C) Copyright 2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +# +# AP121 referance board, MIPS32 core +# + +# ROM version +CONFIG_SYS_TEXT_BASE = 0x9f000000 + +# RAM version +#CONFIG_SYS_TEXT_BASE = 0x80010000 diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig new file mode 100644 index 0000000..cec0bb7 --- /dev/null +++ b/configs/ap121_defconfig @@ -0,0 +1,42 @@ +CONFIG_MIPS=y +CONFIG_TARGET_AP121=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SYS_PROMPT="ap121 # " +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="ap121" +CONFIG_DM=y +CONFIG_DM_SERIAL=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_ATH79_SPI=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_USE_4K_SECTORS=y +CONFIG_SPI_FLASH_DATAFLASH=y +CONFIG_SPI_FLASH_MTD=y +CONFIG_CMD_DM=y +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +# CONFIG_NET is not set +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_CRC32 is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_NET is not set +CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/include/configs/ap121.h b/include/configs/ap121.h new file mode 100644 index 0000000..5a01d11 --- /dev/null +++ b/include/configs/ap121.h @@ -0,0 +1,82 @@ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <linux/kconfig.h> +#include <linux/sizes.h> + +#define CONFIG_ARCH_ATH79 +#define CONFIG_SOC_AR933X + +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_OF_LIBFDT + +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_MHZ 200 +#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) + +/* Cache Configuration */ +#define CONFIG_SYS_DCACHE_SIZE 32 * SZ_1K +#define CONFIG_SYS_ICACHE_SIZE 64 * SZ_1K +#define CONFIG_SYS_CACHELINE_SIZE 32 + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE + +#define CONFIG_SYS_MALLOC_LEN ROUND(0x30000 + 128 * SZ_1K, 0x1000) + +#define CONFIG_SYS_BOOTPARAMS_LEN 128 * SZ_1K + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_LOAD_ADDR 0x81000000 + +#define CONFIG_SYS_INIT_SP_OFFSET 0x20000 +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_AR933X_SERIAL +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} + +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ + "root=/dev/mtdblock2 " \ + "rootfstype=squashfs" +#define CONFIG_BOOTCOMMAND "sf probe;" \ + "mtdparts default;" \ + "bootm 0x9f300000" +#define CONFIG_LZMA + +#define MTDIDS_DEFAULT "nor0=spi-flash.0" +#define MTDPARTS_DEFAULT "mtdparts=spi-flash.0:256k(u-boot)," \ + "64k(u-boot-env),2752k(rootfs),896k(uImage),64k(NVRAM),64k(ART)" + +#define CONFIG_ENV_SPI_MAX_HZ 25000000 +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET (256 * SZ_1K) +#define CONFIG_ENV_SECT_SIZE (64 * SZ_1K) +#define CONFIG_ENV_SIZE (64 * SZ_1K) + +/* + * Command + */ +#define CONFIG_CMD_MTDPARTS + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +/* + * Diagnostics + */ +#define CONFIG_SYS_MEMTEST_START 0x80100000 +#define CONFIG_SYS_MEMTEST_END 0x83f00000 +#define CONFIG_CMD_MEMTEST + +#endif /* __CONFIG_H */