From: Icenowy Zheng icenowy@aosc.io
Some boards have the EMAC TX/RX lanes wired with a different length with the clock lane, which can be workarounded by setting a TX/RX delay in the EMAC.
This kind of delays are already defined in the newest device tree binding of dwmac-sun8i, which has already entered linux-next.
Add support for setting these delays.
Signed-off-by: Icenowy Zheng icenowy@aosc.io --- drivers/net/sun8i_emac.c | 31 +++++++++++++++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index 3ba3a1ff8b..230ff045d5 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -60,6 +60,10 @@ #define SC_ETCS_MASK GENMASK(1, 0) #define SC_ETCS_EXT_GMII 0x1 #define SC_ETCS_INT_GMII 0x2 +#define SC_ETXDC_MASK GENMASK(12, 10) +#define SC_ETXDC_OFFSET 10 +#define SC_ERXDC_MASK GENMASK(9, 5) +#define SC_ERXDC_OFFSET 5
#define CONFIG_MDIO_TIMEOUT (3 * CONFIG_SYS_HZ)
@@ -140,6 +144,8 @@ struct emac_eth_dev { struct sun8i_eth_pdata { struct eth_pdata eth_pdata; u32 reset_delays[3]; + int tx_delay_ps; + int rx_delay_ps; };
@@ -273,7 +279,8 @@ static int sun8i_emac_set_syscon_ephy(struct emac_eth_dev *priv, u32 *reg) return 0; }
-static int sun8i_emac_set_syscon(struct emac_eth_dev *priv) +static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata, + struct emac_eth_dev *priv) { int ret; u32 reg; @@ -312,6 +319,14 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv) return -EINVAL; }
+ if (pdata->tx_delay_ps) + reg |= ((pdata->tx_delay_ps / 100) << SC_ETXDC_OFFSET) + & SC_ETXDC_MASK; + + if (pdata->rx_delay_ps) + reg |= ((pdata->rx_delay_ps / 100) << SC_ERXDC_OFFSET) + & SC_ERXDC_MASK; + writel(reg, priv->sysctl_reg + 0x30);
return 0; @@ -790,7 +805,7 @@ static int sun8i_emac_eth_probe(struct udevice *dev) priv->mac_reg = (void *)pdata->iobase;
sun8i_emac_board_setup(priv); - sun8i_emac_set_syscon(priv); + sun8i_emac_set_syscon((struct sun8i_eth_pdata *)pdata, priv);
sun8i_mdio_init(dev->name, dev); priv->bus = miiphy_get_dev_by_name(dev->name); @@ -891,6 +906,18 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev) if (!priv->use_internal_phy) parse_phy_pins(dev);
+ sun8i_pdata->tx_delay_ps = fdtdec_get_int(gd->fdt_blob, node, + "allwinner,tx-delay-ps", 0); + if (sun8i_pdata->tx_delay_ps < 0 || sun8i_pdata->tx_delay_ps > 700) + printf("%s: Invalid TX delay value %d\n", __func__, + sun8i_pdata->tx_delay_ps); + + sun8i_pdata->rx_delay_ps = fdtdec_get_int(gd->fdt_blob, node, + "allwinner,rx-delay-ps", 0); + if (sun8i_pdata->rx_delay_ps < 0 || sun8i_pdata->rx_delay_ps > 3100) + printf("%s: Invalid RX delay value %d\n", __func__, + sun8i_pdata->rx_delay_ps); + #ifdef CONFIG_DM_GPIO if (fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev), "snps,reset-active-low"))