Please find the header file attached. Below is the output of the make. Thanks for the help.
regards Srini
---------- ppc_8xx-gcc -g -Os -fPIC -ffixed-r14 -meabi -fno-strict-aliasing -D__KERNEL__ -DTEXT_BASE=0x80010000 -I/home/skode/work/u-boot/u-boot-1.1.4/include -fno-builtin -ffreestanding -nostdinc -isystem /opt/hardhat/devkit/ppc/8xx/lib/gcc-lib/powerpc-hardhat-linux/2.95.2/include -pipe -DCONFIG_PPC -D__powerpc__ -DCONFIG_8xx -ffixed-r2 -ffixed-r29 -mstring -mcpu=860 -msoft-float -Wall -Wstrict-prototypes -c -o test_burst.o test_burst.c In file included from /home/skode/work/u-boot/u-boot-1.1.4/include/config.h:2, from /home/skode/work/u-boot/u-boot-1.1.4/include/common.h:35, from test_burst.c:26: /home/skode/work/u-boot/u-boot-1.1.4/include/configs/ep885.h:76: Invalid token in expression /home/skode/work/u-boot/u-boot-1.1.4/include/configs/ep885.h:175: Invalid token in expression In file included from test_burst.c:27: /home/skode/work/u-boot/u-boot-1.1.4/include/exports.h:23: Invalid token in expression In file included from /home/skode/work/u-boot/u-boot-1.1.4/include/exports.h:34, from test_burst.c:27: /home/skode/work/u-boot/u-boot-1.1.4/include/_exports.h:15: Invalid token in expression In file included from /home/skode/work/u-boot/u-boot-1.1.4/include/config.h:2, from /home/skode/work/u-boot/u-boot-1.1.4/include/common.h:35, from test_burst.c:26: /home/skode/work/u-boot/u-boot-1.1.4/include/configs/ep885.h:47: parse error before `|' /home/skode/work/u-boot/u-boot-1.1.4/include/configs/ep885.h:47: stray '' in program test_burst.c: In function `test_burst_start': test_burst.c:176: warning: unsigned int format, long unsigned int arg (arg 2) test_burst.c: In function `test_desc': test_burst.c:255: warning: int format, long int arg (arg 2) test_burst.c: In function `test_error': test_burst.c:281: warning: unsigned int format, pointer arg (arg 3) test_burst.c:281: warning: unsigned int format, long unsigned int arg (arg 4) test_burst.c:281: warning: unsigned int format, long unsigned int arg (arg 5) make[1]: *** [test_burst.o] Error 1 make[1]: Leaving directory `/home/skode/work/u-boot/u-boot-1.1.4/examples' make: *** [examples] Error 2
--- Wolfgang Denk wd@denx.de wrote:
In message 20060628231631.16647.qmail@web54304.mail.yahoo.com you wrote:
I am porting u-boot-1.1.4 for one of our board. I have the below code in my header file.
There is probably more code (or, to be precise, more definitions) in this file...
#if (CONFIG_COMMANDS & CFG_CMD_KGDB) #define CFG_CBSIZE 1024 /* Console I/O Buffer Size
*/
#else #define CFG_CBSIZE 256 /* Console I/O Buffer Size
*/
#endif
I am getting a compile error: Invalid token in expression
And there was no line number or so with this error message?
Am I missing something?
Yes: providing enough of context for a helpful reply.
Best regards,
Wolfgang Denk
-- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de The optimum committee has no members. - Norman Augustine
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/*****************************************************************************
******************************************************************************/ #ifndef __CONFIG_H #define __CONFIG_H
/* * High Level Configuration Options * (easy to change) */
#define CONFIG_MPC860 1 /* This is a MPC860T style CPU */ #define CONFIG_MPC860T 1
#define CONFIG_MISC_INIT_R 1 #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
//#define CONFIG_8xx_CONS_SCC1 /* Console is on SCC */ #undef CONFIG_8xx_CONS_SCC1 #undef CONFIG_8xx_CONS_SCC2 #undef CONFIG_8xx_CONS_SCC3 #undef CONFIG_8xx_CONS_SCC4 #define CONFIG_8xx_CONS_SMC1 #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE
#define CONFIG_BAUDRATE 38400 #define CONFIG_CLOCKS_IN_MHZ 1
#define MPC8XX_FACT 2
#define CONFIG_8xx_GCLK_FREQ (50000000UL)
#define CONFIG_USE_UPMB 1 //#define CONFIG_ECLIPSE_CF 1 //#define CONFIG_ECLIPSE_CF_JFB 1 //#define CONFIG_ECLIPSE_RAM_INIT 1
#if 0 #define CONFIG_BOOTDELAY -1 /* autoboot disabled */ #else #define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */ #endif
/* POST support */ #define CONFIG_POST ( CFG_POST_CACHE | CFG_POST_MEMORY | CFG_POST_CPU | \ CFG_POST_UART | CFG_POST_ETHER | CFG_POST_SPI | \ CFG_POST_SPR ) #ifdef CONFIG_POST #define CFG_CMD_POST_DIAG CFG_CMD_DIAG #else #define CFG_CMD_POST_DIAG 0 #endif
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
#define CONFIG_WATCHDOG /* watchdog enabled */ #define WATCHDOG_PATT_MAGIC 0x20040130
#define CONFIG_COMMANDS ( CFG_CMD_NET | CONFIG_CMD_DFL | CFG_CMD_SDRAM | \ CFG_CMD_PCMCIA | CFG_CMD_IDE | CFG_CMD_DIAG | CFG_CMD_BSP ) #define CONFIG_DOS_PARTITION
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h>
/* * Miscellaneous configurable options */ #undef CFG_LONGHELP /* undef to save memory */ #define CFG_PROMPT "IDU300# " /* Monitor Command Prompt */
#if (CONFIG_COMMANDS & CFG_CMD_KGDB) #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ #else #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ #endif
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ #define CFG_MAXARGS 16 /* max number of command args */ #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_MEMTEST_START 0x0400000 /* memtest works on */ #define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
#define CFG_LOAD_ADDR 0x200000 /* default load address */
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/*----------------------------------------------------------------------- * Autoboot configuration */ #define CONFIG_AUTOBOOT_KEYED 1 #define CONFIG_AUTOBOOT_STOP_STR "ep885" #define CONFIG_AUTOBOOT_PROMPT "ep885 start in %d seconds\n" #define CONFIG_AUTOBOOT_IGNORE 1
/* * Low Level Configuration Settings * (address mappings, register initial values, etc.) * You should know what you are doing if you make changes here. */ /*----------------------------------------------------------------------- * Physical memory map */ #define CFG_IMMR (0xFA200000) /* Internal Memory Mapped Register*/ #define CFG_IMMR_SIZE ((uint)(64 * 1024))
/*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in DPRAM) */ #define CFG_INIT_RAM_ADDR (CFG_IMMR) #define CFG_INIT_RAM_END (0x2f00) /* End of used area in DPRAM */ #define CFG_GBL_DATA_SIZE (64) /* size in bytes reserved for initial data */ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_INIT_VPD_SIZE (0) /* size in bytes reserved for vpd buffer */ #define CFG_INIT_VPD_OFFSET (CFG_GBL_DATA_OFFSET - CFG_INIT_VPD_SIZE) #define CFG_INIT_SP_OFFSET (CFG_INIT_VPD_OFFSET-8)
/*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x00000000 #define CFG_FLASH_BASE 0x80000000 #define CFG_FLASH_BASE1 0xA0000000 #define CFG_RESET_ADDRESS (CFG_FLASH_BASE-4) #define CFG_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
#define CFG_MONITOR_BASE 0x80010000 #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
/* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/*----------------------------------------------------------------------- * FLASH organization */ #define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ #define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */ #define FLASH_BASE0_PRELIM CFG_FLASH_BASE #define FLASH_BASE1_PRELIM CFG_FLASH_BASE1
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ #define CFG_CMD_FLASH_PROT_REG 1
/*----------------------------------------------------------------------- * NVRAM Configuration * * Note: the MBX is special because there is already a firmware on this * board: EPPC-Bug from Motorola. To avoid collisions in NVRAM Usage, we * access the NVRAM at the offset 0x1000. */ #define CFG_ENV_IS_IN_FLASH 1 #undef CFG_ENV_IS_IN_NVRAM /* 1 turn on NVRAM env feature */ #define CFG_ENV_OFFSET 0x4000 #define CFG_ENV_ADDR (0x80004000) #define CFG_ENV_SECT_SIZE 0x2000
/*----------------------------------------------------------------------- * Cache Configuration */ #define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */ #if (CONFIG_COMMANDS & CFG_CMD_KGDB) #define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */ #endif
/*----------------------------------------------------------------------- * SYPCR - System Protection Control 11-9 * SYPCR can only be written once after reset! *----------------------------------------------------------------------- * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze */ #if defined(CONFIG_WATCHDOG) #define CFG_SYPCR ( SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \ SYPCR_SWE | SYPCR_SWRI | SYPCR_SWP ) #else #define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF) #endif
/*----------------------------------------------------------------------- * SIUMCR - SIU Module Configuration 11-6 *----------------------------------------------------------------------- * PCMCIA config., multi-function pin tri-state */ #define CFG_SIUMCR (SIUMCR_DBGC11 | SIUMCR_DPC | SIUMCR_MLRC10 | \ SIUMCR_SEME)
/*----------------------------------------------------------------------- * TBSCR - Time Base Status and Control 11-26 *----------------------------------------------------------------------- * Clear Reference Interrupt Status, Timebase freezing enabled */ #define CFG_TBSCR (TBSCR_REFA | TBSCR_REFB | TBSCR_TBF)
/*----------------------------------------------------------------------- * PISCR - Periodic Interrupt Status and Control 11-31 *----------------------------------------------------------------------- * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled */ #define CFG_PISCR (PISCR_PS | PISCR_PITF | PISCR_PTE)
/*----------------------------------------------------------------------- * PLPRCR - PLL, Low-Power, and Reset Control Register 15-30 *----------------------------------------------------------------------- * Reset PLL lock status sticky bit, timer expired status bit and timer * interrupt status bit - Set PLL multiplication factor to 1 */ #define CFG_PLPRCR (0x00104000) /* #define CFG_PLPRCR (0x00004000 | ((MPC8XX_FACT-1) << PLPRCR_MF_SHIFT) ) */
/*----------------------------------------------------------------------- * SCCR - System Clock and reset Control Register 15-27 *----------------------------------------------------------------------- * Set clock output, timebase and RTC source and divider, * power management and some other internal clocks */ #define SCCR_MASK (SCCR_RTDIV | SCCR_RTSEL| SCCR_EBDF11) #define CFG_SCCR SCCR_TBS
/* * Internal Definitions * * Boot Flags */ #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ #define BOOTFLAG_WARM 0x02 /* Software reboot */
/* * MPC8xx CPM Options */ #define CONFIG_FEC_ENET 1 #define FEC_ENET 1 #undef CONFIG_CPM_IIC #undef CONFIG_UCODE_PATCH
#endif /* __CONFIG_H */