The name of a node should be somewhat generic, reflecting the function of the device and not its precise programming model.
- oscillator - syscon - clock-controller - reset-controller - serial - gpio - ethernet - usb-phy - usb
[1] devicetree-specification-v0.3.pdf https://github.com/devicetree-org/devicetree-specification/releases/tag/v0.3
Signed-off-by: Du Huanpeng dhu@hodcarrier.org --- arch/mips/dts/mt7620.dtsi | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/mips/dts/mt7620.dtsi b/arch/mips/dts/mt7620.dtsi index 03a80b7a70..27a7fbdef2 100644 --- a/arch/mips/dts/mt7620.dtsi +++ b/arch/mips/dts/mt7620.dtsi @@ -18,7 +18,7 @@ }; };
- clk48m: clk48m@0 { + clk48m: oscillator { compatible = "fixed-clock";
clock-frequency = <48000000>; @@ -26,32 +26,32 @@ #clock-cells = <0>; };
- sysc: sysc@10000000 { + sysc: syscon@10000000 { compatible = "mediatek,mt7620-sysc"; reg = <0x10000000 0x100>; };
- clkctrl: clkctrl@10000030 { + clkctrl: clock-controller@10000030 { compatible = "mediatek,mt7620-clk"; mediatek,sysc = <&sysc>;
#clock-cells = <1>; };
- rstctrl: rstctrl@10000034 { + rstctrl: reset-controller@10000034 { compatible = "mediatek,mtmips-reset"; reg = <0x10000034 0x4>; #reset-cells = <1>; };
- reboot: resetctl-reboot { + reboot: reset-controller { compatible = "resetctl-reboot";
resets = <&rstctrl SYS_RST>; reset-names = "sysreset"; };
- uartfull: uartfull@10000500 { + uartfull: serial@10000500 { compatible = "mediatek,mt7620-uart"; reg = <10000500 0x100>;
@@ -68,7 +68,7 @@ status = "disabled"; };
- uartlite: uartlite@10000c00 { + uartlite: serial@10000c00 { compatible = "mediatek,mt7620-uart"; reg = <0x10000c00 0x100>;
@@ -158,7 +158,7 @@ reset-names = "wdt"; };
- gpio0: gpio0@10000600 { + gpio0: gpio@10000600 { compatible = "mediatek,mt7620-gpio"; reg = <0x10000600 0x34>;
@@ -173,7 +173,7 @@ #gpio-cells = <2>; };
- gpio1: gpio1@10000638 { + gpio1: gpio@10000638 { compatible = "mediatek,mt7620-gpio"; reg = <0x10000638 0x24>;
@@ -188,7 +188,7 @@ #gpio-cells = <2>; };
- gpio2: gpio2@10000660 { + gpio2: gpio@10000660 { compatible = "mediatek,mt7620-gpio"; reg = <0x10000660 0x24>;
@@ -203,7 +203,7 @@ #gpio-cells = <2>; };
- gpio3: gpio3@10000688 { + gpio3: gpio@10000688 { compatible = "mediatek,mt7620-gpio"; reg = <0x10000688 0x24>;
@@ -234,7 +234,7 @@ clocks = <&clkctrl CLK_SPI>; };
- eth: eth@10100000 { + eth: ethernet@10100000 { compatible = "mediatek,mt7620-eth"; reg = <0x10100000 0x10000 0x10110000 0x8000>; @@ -255,7 +255,7 @@ status = "disabled"; };
- usb_phy: mt7620-usb-phy { + usb_phy: usb-phy { compatible = "mediatek,mt7620-usbphy";
#phy-cells = <0>; @@ -269,7 +269,7 @@ reset-names = "uhst", "udev"; };
- ehci@101c0000 { + ehci: usb@101c0000 { compatible = "generic-ehci"; reg = <0x101c0000 0x1000>;