This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The deadline for this conversion was the v2019.07 release. The use of CONFIG_AHCI requires CONFIG_DM. The deadline for this conversion was v2020.01. Remove this board.
Cc: Rob Herring robh@kernel.org Signed-off-by: Tom Rini trini@konsulko.com --- arch/arm/Kconfig | 7 -- arch/arm/Makefile | 1 - arch/arm/mach-highbank/Kconfig | 12 -- arch/arm/mach-highbank/Makefile | 6 - arch/arm/mach-highbank/timer.c | 34 ------ board/highbank/MAINTAINERS | 6 - board/highbank/Makefile | 6 - board/highbank/ahci.c | 207 -------------------------------- board/highbank/highbank.c | 148 ----------------------- configs/highbank_defconfig | 28 ----- include/configs/highbank.h | 60 --------- 11 files changed, 515 deletions(-) delete mode 100644 arch/arm/mach-highbank/Kconfig delete mode 100644 arch/arm/mach-highbank/Makefile delete mode 100644 arch/arm/mach-highbank/timer.c delete mode 100644 board/highbank/MAINTAINERS delete mode 100644 board/highbank/Makefile delete mode 100644 board/highbank/ahci.c delete mode 100644 board/highbank/highbank.c delete mode 100644 configs/highbank_defconfig delete mode 100644 include/configs/highbank.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 95557d6ed6bd..6fa69d39be5b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -750,11 +750,6 @@ config ARCH_S5PC1XX select DM_SERIAL imply CMD_DM
-config ARCH_HIGHBANK - bool "Calxeda Highbank" - select CPU_V7A - select PL011_SERIAL - config ARCH_INTEGRATOR bool "ARM Ltd. Integrator family" select DM @@ -1873,8 +1868,6 @@ source "arch/arm/mach-davinci/Kconfig"
source "arch/arm/mach-exynos/Kconfig"
-source "arch/arm/mach-highbank/Kconfig" - source "arch/arm/mach-integrator/Kconfig"
source "arch/arm/mach-ipq40xx/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 28b523b37c70..e1d266c3a4d8 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -57,7 +57,6 @@ machine-$(CONFIG_ARCH_BCM283X) += bcm283x machine-$(CONFIG_ARCH_BCMSTB) += bcmstb machine-$(CONFIG_ARCH_DAVINCI) += davinci machine-$(CONFIG_ARCH_EXYNOS) += exynos -machine-$(CONFIG_ARCH_HIGHBANK) += highbank machine-$(CONFIG_ARCH_IPQ40XX) += ipq40xx machine-$(CONFIG_ARCH_K3) += k3 machine-$(CONFIG_ARCH_KEYSTONE) += keystone diff --git a/arch/arm/mach-highbank/Kconfig b/arch/arm/mach-highbank/Kconfig deleted file mode 100644 index 0e73c0414293..000000000000 --- a/arch/arm/mach-highbank/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if ARCH_HIGHBANK - -config SYS_BOARD - default "highbank" - -config SYS_SOC - default "highbank" - -config SYS_CONFIG_NAME - default "highbank" - -endif diff --git a/arch/arm/mach-highbank/Makefile b/arch/arm/mach-highbank/Makefile deleted file mode 100644 index 029e266bedce..000000000000 --- a/arch/arm/mach-highbank/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -obj-y := timer.o diff --git a/arch/arm/mach-highbank/timer.c b/arch/arm/mach-highbank/timer.c deleted file mode 100644 index 2423a0e37855..000000000000 --- a/arch/arm/mach-highbank/timer.c +++ /dev/null @@ -1,34 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2010-2011 Calxeda, Inc. - * - * Based on arm926ejs/mx27/timer.c - */ - -#include <common.h> -#include <init.h> -#include <asm/io.h> -#include <asm/arch-armv7/systimer.h> - -#undef SYSTIMER_BASE -#define SYSTIMER_BASE 0xFFF34000 /* Timer 0 and 1 base */ - -static struct systimer *systimer_base = (struct systimer *)SYSTIMER_BASE; - -/* - * Start the timer - */ -int timer_init(void) -{ - /* - * Setup timer0 - */ - writel(0, &systimer_base->timer0control); - writel(SYSTIMER_RELOAD, &systimer_base->timer0load); - writel(SYSTIMER_RELOAD, &systimer_base->timer0value); - writel(SYSTIMER_EN | SYSTIMER_32BIT | SYSTIMER_PRESC_256, - &systimer_base->timer0control); - - return 0; - -} diff --git a/board/highbank/MAINTAINERS b/board/highbank/MAINTAINERS deleted file mode 100644 index 69ddeddd6003..000000000000 --- a/board/highbank/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -HIGHBANK BOARD -M: Rob Herring robh@kernel.org -S: Maintained -F: board/highbank/ -F: include/configs/highbank.h -F: configs/highbank_defconfig diff --git a/board/highbank/Makefile b/board/highbank/Makefile deleted file mode 100644 index 57f7f2e2a658..000000000000 --- a/board/highbank/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -obj-y := highbank.o ahci.o diff --git a/board/highbank/ahci.c b/board/highbank/ahci.c deleted file mode 100644 index 9c057278ace1..000000000000 --- a/board/highbank/ahci.c +++ /dev/null @@ -1,207 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2012 Calxeda, Inc. - */ - -#include <common.h> -#include <ahci.h> -#include <asm/io.h> -#include <linux/delay.h> - -#define CPHY_MAP(dev, addr) ((((dev) & 0x1f) << 7) | (((addr) >> 9) & 0x7f)) -#define CPHY_ADDR(base, dev, addr) ((base) | (((addr) & 0x1ff) << 2)) -#define CPHY_BASE 0xfff58000 -#define CPHY_WIDTH 0x1000 -#define CPHY_DTE_XS 5 -#define CPHY_MII 31 -#define SERDES_CR_CTL 0x80a0 -#define SERDES_CR_ADDR 0x80a1 -#define SERDES_CR_DATA 0x80a2 -#define CR_BUSY 0x0001 -#define CR_START 0x0001 -#define CR_WR_RDN 0x0002 -#define CPHY_TX_INPUT_STS 0x2001 -#define CPHY_RX_INPUT_STS 0x2002 -#define CPHY_SATA_TX_OVERRIDE_BIT 0x8000 -#define CPHY_SATA_RX_OVERRIDE_BIT 0x4000 -#define CPHY_TX_INPUT_OVERRIDE 0x2004 -#define CPHY_RX_INPUT_OVERRIDE 0x2005 -#define SPHY_LANE 0x100 -#define SPHY_HALF_RATE 0x0001 -#define CPHY_SATA_DPLL_MODE 0x0700 -#define CPHY_SATA_DPLL_SHIFT 8 -#define CPHY_SATA_TX_ATTEN 0x1c00 -#define CPHY_SATA_TX_ATTEN_SHIFT 10 - -#define HB_SREG_SATA_ATTEN 0xfff3cf24 - -#define SATA_PORT_BASE 0xffe08000 -#define SATA_VERSIONR 0xf8 -#define SATA_HB_VERSION 0x3332302a - -static u32 __combo_phy_reg_read(u8 phy, u8 dev, u32 addr) -{ - u32 data; - writel(CPHY_MAP(dev, addr), CPHY_BASE + 0x800 + CPHY_WIDTH * phy); - data = readl(CPHY_ADDR(CPHY_BASE + CPHY_WIDTH * phy, dev, addr)); - return data; -} - -static void __combo_phy_reg_write(u8 phy, u8 dev, u32 addr, u32 data) -{ - writel(CPHY_MAP(dev, addr), CPHY_BASE + 0x800 + CPHY_WIDTH * phy); - writel(data, CPHY_ADDR(CPHY_BASE + CPHY_WIDTH * phy, dev, addr)); -} - -static u32 combo_phy_read(u8 phy, u32 addr) -{ - u8 dev = CPHY_DTE_XS; - if (phy == 5) - dev = CPHY_MII; - while (__combo_phy_reg_read(phy, dev, SERDES_CR_CTL) & CR_BUSY) - udelay(5); - __combo_phy_reg_write(phy, dev, SERDES_CR_ADDR, addr); - __combo_phy_reg_write(phy, dev, SERDES_CR_CTL, CR_START); - while (__combo_phy_reg_read(phy, dev, SERDES_CR_CTL) & CR_BUSY) - udelay(5); - return __combo_phy_reg_read(phy, dev, SERDES_CR_DATA); -} - -static void combo_phy_write(u8 phy, u32 addr, u32 data) -{ - u8 dev = CPHY_DTE_XS; - if (phy == 5) - dev = CPHY_MII; - while (__combo_phy_reg_read(phy, dev, SERDES_CR_CTL) & CR_BUSY) - udelay(5); - __combo_phy_reg_write(phy, dev, SERDES_CR_ADDR, addr); - __combo_phy_reg_write(phy, dev, SERDES_CR_DATA, data); - __combo_phy_reg_write(phy, dev, SERDES_CR_CTL, CR_WR_RDN | CR_START); -} - -static void cphy_spread_spectrum_override(u8 phy, u8 lane, u32 val) -{ - u32 tmp; - tmp = combo_phy_read(phy, CPHY_RX_INPUT_STS + lane * SPHY_LANE); - tmp &= ~CPHY_SATA_RX_OVERRIDE_BIT; - combo_phy_write(phy, CPHY_RX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); - - tmp |= CPHY_SATA_RX_OVERRIDE_BIT; - combo_phy_write(phy, CPHY_RX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); - - tmp &= ~CPHY_SATA_DPLL_MODE; - tmp |= (val << CPHY_SATA_DPLL_SHIFT) & CPHY_SATA_DPLL_MODE; - combo_phy_write(phy, CPHY_RX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); -} - -static void cphy_tx_attenuation_override(u8 phy, u8 lane) -{ - u32 val; - u32 tmp; - u8 shift; - - shift = ((phy == 5) ? 4 : lane) * 4; - - val = (readl(HB_SREG_SATA_ATTEN) >> shift) & 0xf; - - if (val & 0x8) - return; - - tmp = combo_phy_read(phy, CPHY_TX_INPUT_STS + lane * SPHY_LANE); - tmp &= ~CPHY_SATA_TX_OVERRIDE_BIT; - combo_phy_write(phy, CPHY_TX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); - - tmp |= CPHY_SATA_TX_OVERRIDE_BIT; - combo_phy_write(phy, CPHY_TX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); - - tmp |= (val << CPHY_SATA_TX_ATTEN_SHIFT) & CPHY_SATA_TX_ATTEN; - combo_phy_write(phy, CPHY_TX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); -} - -static void cphy_disable_port_overrides(u8 port) -{ - u32 tmp; - u8 lane = 0, phy = 0; - - if (port == 0) - phy = 5; - else if (port < 5) - lane = port - 1; - else - return; - tmp = combo_phy_read(phy, CPHY_RX_INPUT_STS + lane * SPHY_LANE); - tmp &= ~CPHY_SATA_RX_OVERRIDE_BIT; - combo_phy_write(phy, CPHY_RX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); - - tmp = combo_phy_read(phy, CPHY_TX_INPUT_OVERRIDE + lane * SPHY_LANE); - tmp &= ~CPHY_SATA_TX_OVERRIDE_BIT; - combo_phy_write(phy, CPHY_TX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); -} - -void cphy_disable_overrides(void) -{ - int i; - u32 port_map; - - port_map = readl(0xffe08000 + HOST_PORTS_IMPL); - for (i = 0; i < 5; i++) { - if (port_map & (1 << i)) - cphy_disable_port_overrides(i); - } -} - -static void cphy_override_lane(u8 port) -{ - u32 tmp, k = 0; - u8 lane = 0, phy = 0; - - if (port == 0) - phy = 5; - else if (port < 5) - lane = port - 1; - else - return; - - do { - tmp = combo_phy_read(0, CPHY_RX_INPUT_STS + - lane * SPHY_LANE); - } while ((tmp & SPHY_HALF_RATE) && (k++ < 1000)); - cphy_spread_spectrum_override(phy, lane, 3); - cphy_tx_attenuation_override(phy, lane); -} - -#define WAIT_MS_LINKUP 4 - -int ahci_link_up(struct ahci_uc_priv *probe_ent, int port) -{ - u32 tmp; - int j = 0; - u8 *port_mmio = (u8 *)probe_ent->port[port].port_mmio; - u32 is_highbank = readl(SATA_PORT_BASE + SATA_VERSIONR) == - SATA_HB_VERSION ? 1 : 0; - - /* Bring up SATA link. - * SATA link bringup time is usually less than 1 ms; only very - * rarely has it taken between 1-2 ms. Never seen it above 2 ms. - */ - while (j < WAIT_MS_LINKUP) { - if (is_highbank && (j == 0)) { - cphy_disable_port_overrides(port); - writel(0x301, port_mmio + PORT_SCR_CTL); - udelay(1000); - writel(0x300, port_mmio + PORT_SCR_CTL); - udelay(1000); - cphy_override_lane(port); - } - - tmp = readl(port_mmio + PORT_SCR_STAT); - if ((tmp & 0xf) == 0x3) - return 0; - udelay(1000); - j++; - - if ((j == WAIT_MS_LINKUP) && (tmp & 0xf)) - j = 0; /* retry phy reset */ - } - return 1; -} diff --git a/board/highbank/highbank.c b/board/highbank/highbank.c deleted file mode 100644 index e07295c7b5c0..000000000000 --- a/board/highbank/highbank.c +++ /dev/null @@ -1,148 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2010-2011 Calxeda, Inc. - */ - -#include <common.h> -#include <ahci.h> -#include <cpu_func.h> -#include <env.h> -#include <fdt_support.h> -#include <init.h> -#include <net.h> -#include <netdev.h> -#include <scsi.h> - -#include <linux/sizes.h> -#include <asm/io.h> - -#define HB_AHCI_BASE 0xffe08000 - -#define HB_SCU_A9_PWR_STATUS 0xfff10008 -#define HB_SREG_A9_PWR_REQ 0xfff3cf00 -#define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04 -#define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20 -#define HB_SREG_A15_PWR_CTRL 0xfff3c200 - -#define HB_PWR_SUSPEND 0 -#define HB_PWR_SOFT_RESET 1 -#define HB_PWR_HARD_RESET 2 -#define HB_PWR_SHUTDOWN 3 - -#define PWRDOM_STAT_SATA 0x80000000 -#define PWRDOM_STAT_PCI 0x40000000 -#define PWRDOM_STAT_EMMC 0x20000000 - -#define HB_SCU_A9_PWR_NORMAL 0 -#define HB_SCU_A9_PWR_DORMANT 2 -#define HB_SCU_A9_PWR_OFF 3 - -DECLARE_GLOBAL_DATA_PTR; - -void cphy_disable_overrides(void); - -/* - * Miscellaneous platform dependent initialisations - */ -int board_init(void) -{ - icache_enable(); - - return 0; -} - -/* We know all the init functions have been run now */ -int board_eth_init(struct bd_info *bis) -{ - int rc = 0; - -#ifdef CONFIG_CALXEDA_XGMAC - rc += calxedaxgmac_initialize(0, 0xfff50000); - rc += calxedaxgmac_initialize(1, 0xfff51000); -#endif - return rc; -} - -#ifdef CONFIG_SCSI_AHCI_PLAT -void scsi_init(void) -{ - u32 reg = readl(HB_SREG_A9_PWRDOM_STAT); - - cphy_disable_overrides(); - if (reg & PWRDOM_STAT_SATA) { - ahci_init((void __iomem *)HB_AHCI_BASE); - scsi_scan(true); - } -} -#endif - -#ifdef CONFIG_MISC_INIT_R -int misc_init_r(void) -{ - char envbuffer[16]; - u32 boot_choice; - - boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff; - sprintf(envbuffer, "bootcmd%d", boot_choice); - if (env_get(envbuffer)) { - sprintf(envbuffer, "run bootcmd%d", boot_choice); - env_set("bootcmd", envbuffer); - } else - env_set("bootcmd", ""); - - return 0; -} -#endif - -int dram_init(void) -{ - gd->ram_size = SZ_512M; - return 0; -} - -#if defined(CONFIG_OF_BOARD_SETUP) -int ft_board_setup(void *fdt, struct bd_info *bd) -{ - static const char disabled[] = "disabled"; - u32 reg = readl(HB_SREG_A9_PWRDOM_STAT); - - if (!(reg & PWRDOM_STAT_SATA)) - do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status", - disabled, sizeof(disabled), 1); - - if (!(reg & PWRDOM_STAT_EMMC)) - do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status", - disabled, sizeof(disabled), 1); - - return 0; -} -#endif - -static int is_highbank(void) -{ - uint32_t midr; - - asm volatile ("mrc p15, 0, %0, c0, c0, 0\n" : "=r"(midr)); - - return (midr & 0xfff0) == 0xc090; -} - -void reset_cpu(ulong addr) -{ - writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ); - if (is_highbank()) - writeb(HB_SCU_A9_PWR_OFF, HB_SCU_A9_PWR_STATUS); - else - writel(0x1, HB_SREG_A15_PWR_CTRL); - - wfi(); -} - -/* - * turn off the override before transferring control to Linux, since Linux - * may not support spread spectrum. - */ -void arch_preboot_os(void) -{ - cphy_disable_overrides(); -} diff --git a/configs/highbank_defconfig b/configs/highbank_defconfig deleted file mode 100644 index 369b65ceee88..000000000000 --- a/configs/highbank_defconfig +++ /dev/null @@ -1,28 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_SYS_THUMB_BUILD=y -CONFIG_ARCH_HIGHBANK=y -CONFIG_SYS_TEXT_BASE=0x00008000 -CONFIG_NR_DRAM_BANKS=0 -CONFIG_ENV_SIZE=0x2000 -CONFIG_SYS_BOOTCOUNT_ADDR=0xfff3cf0c -CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y -CONFIG_DISTRO_DEFAULTS=y -CONFIG_FIT=y -CONFIG_OF_BOARD_SETUP=y -CONFIG_AUTOBOOT_KEYED=y -CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds...\nPress <s> to stop or <d> to delay\n" -CONFIG_AUTOBOOT_KEYED_CTRLC=y -# CONFIG_USE_BOOTCOMMAND is not set -# CONFIG_DISPLAY_CPUINFO is not set -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_MISC_INIT_R=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_ENV_IS_IN_NVRAM=y -CONFIG_ENV_ADDR=0xFFF88000 -CONFIG_SCSI_AHCI=y -CONFIG_BOOTCOUNT_LIMIT=y -# CONFIG_MMC is not set -CONFIG_SCSI=y -CONFIG_CONS_INDEX=0 -CONFIG_OF_LIBFDT=y diff --git a/include/configs/highbank.h b/include/configs/highbank.h deleted file mode 100644 index bdbaa475d204..000000000000 --- a/include/configs/highbank.h +++ /dev/null @@ -1,60 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2010-2011 Calxeda, Inc. - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_SYS_BOOTMAPSZ (16 << 20) - -#define CONFIG_SYS_TIMER_RATE (150000000/256) -#define CONFIG_SYS_TIMER_COUNTER (0xFFF34000 + 0x4) -#define CONFIG_SYS_TIMER_COUNTS_DOWN - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (512 * 1024) - -#define CONFIG_PL011_CLOCK 150000000 -#define CONFIG_PL01x_PORTS { (void *)(0xFFF36000) } - -#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */ - -#define CONFIG_SCSI_AHCI_PLAT -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 5 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) - -#define CONFIG_CALXEDA_XGMAC - -#define CONFIG_BOOT_RETRY_TIME -1 -#define CONFIG_RESET_TO_RETRY - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - -#define CONFIG_SYS_LOAD_ADDR 0x800000 -#define CONFIG_SYS_64BIT_LBA - -/*----------------------------------------------------------------------- - * Physical Memory Map - * The DRAM is already setup, so do not touch the DT node later. - */ -#define PHYS_SDRAM_1_SIZE (4089 << 20) - -/* Environment data setup -*/ -#define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */ -#define CONFIG_SYS_NVRAM_SIZE 0x8000 /* NVRAM size */ - -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_INIT_SP_ADDR 0x01000000 -#define CONFIG_SKIP_LOWLEVEL_INIT - -#endif