
6 Nov
2013
6 Nov
'13
1:48 p.m.
On Mon, Nov 4, 2013 at 11:20 PM, Lokesh Vutla lokeshvutla@ti.com wrote:
Adding DPLLs Multiplier and DIvider values for GP EVM Following are the DPLL locking frequencies at OPP NOM MPU locks at 600MHz Core locks at 1000MHz Per locks at 960MHz DDR locks at 400MHz
Comment on getting the data from eFuse or falling back to lower freq applies here too.
Regards, Vaibhav