Describe the FMan Ethernet interfaces present on the board.
Signed-off-by: Camelia Groza camelia.groza@nxp.com --- arch/arm/dts/fsl-ls1046a-frwy.dts | 48 ++++++++++++++++++++++++++++++- 1 file changed, 47 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/fsl-ls1046a-frwy.dts b/arch/arm/dts/fsl-ls1046a-frwy.dts index cda05411d881..1e656d496025 100644 --- a/arch/arm/dts/fsl-ls1046a-frwy.dts +++ b/arch/arm/dts/fsl-ls1046a-frwy.dts @@ -2,7 +2,7 @@ /* * Device Tree Include file for NXP Layerscape-1046A family SoC. * - * Copyright 2019 NXP + * Copyright 2019-2023 NXP * */
@@ -34,3 +34,49 @@ &i2c0 { status = "okay"; }; + +#include "fsl-ls1046-post.dtsi" + +&fman0 { + ethernet@e0000 { + phy-handle = <&qsgmii_phy4>; + phy-connection-type = "qsgmii"; + status = "okay"; + }; + + ethernet@e8000 { + phy-handle = <&qsgmii_phy2>; + phy-connection-type = "qsgmii"; + status = "okay"; + }; + + ethernet@ea000 { + phy-handle = <&qsgmii_phy1>; + phy-connection-type = "qsgmii"; + status = "okay"; + }; + + ethernet@f2000 { + phy-handle = <&qsgmii_phy3>; + phy-connection-type = "qsgmii"; + status = "okay"; + }; + + mdio@fd000 { + qsgmii_phy1: ethernet-phy@1c { + reg = <0x1c>; + }; + + qsgmii_phy2: ethernet-phy@1d { + reg = <0x1d>; + }; + + qsgmii_phy3: ethernet-phy@1e { + reg = <0x1e>; + }; + + qsgmii_phy4: ethernet-phy@1f { + reg = <0x1f>; + }; + }; +};