On 21:16 Tue 02 Jun , Kim, Heung Jun wrote:
CC: Dirk Behme dirk.behme@googlemail.com Signed-off-by: HeungJun, Kim riverful.kim@samsung.com
The omap3 L2 cache enable/disable function in the cpu/arm_cortexa8/cpu.c moved to cpu/arm_cortexa8/omap3/cache.c. Because, it must be CortexA8 ARCH generic code below the cpu/arm_cortexa8.
This patches fixes the First issue in the following
http://lists.denx.de/pipermail/u-boot/2009-May/053433.html
The Second issue is fixed by
http://lists.denx.de/pipermail/u-boot/2009-May/053490.html
cpu/arm_cortexa8/cpu.c | 70 ++--------------------------- cpu/arm_cortexa8/omap3/Makefile | 2 +- cpu/arm_cortexa8/omap3/board.c | 5 +- cpu/arm_cortexa8/omap3/cache.c | 96 +++++++++++++++++++++++++++++++++++++++ include/asm-arm/cache.h | 31 +++++++++++++ 5 files changed, 135 insertions(+), 69 deletions(-) create mode 100644 cpu/arm_cortexa8/omap3/cache.c create mode 100644 include/asm-arm/cache.h
applied to arm/next with manual merge
for your next please do base your code on the arm/next
Best Regards, J.