As the timer 2 is on APB1 bus, the maximum of clock frequency of APB1 timer clock is half of SYSCLK. Then to calculate the timer prescaler for timer 2 which need to be divided by 2.
Signed-off-by: Bo Shen voice.shen@gmail.com --- arch/arm/mach-stm32/stm32f7/timer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-stm32/stm32f7/timer.c b/arch/arm/mach-stm32/stm32f7/timer.c index c15f8bb..b04c101 100644 --- a/arch/arm/mach-stm32/stm32f7/timer.c +++ b/arch/arm/mach-stm32/stm32f7/timer.c @@ -26,7 +26,7 @@ int timer_init(void) /* Stop the timer */ writel(readl(&gpt1_regs_ptr->cr1) & ~GPT_CR1_CEN, &gpt1_regs_ptr->cr1);
- writel((CONFIG_SYS_CLK_FREQ/CONFIG_SYS_HZ_CLOCK) - 1, + writel((CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ_CLOCK) - 1, &gpt1_regs_ptr->psc);
/* Configure timer for auto-reload */