Currently a working SPL for V3s can be built now.
The U-Boot main binary still cannot work.
Signed-off-by: Icenowy Zheng icenowy@aosc.xyz --- arch/arm/include/asm/arch-sunxi/gpio.h | 1 + arch/arm/mach-sunxi/board.c | 9 +++++++-- arch/arm/mach-sunxi/cpu_info.c | 2 ++ board/sunxi/Kconfig | 13 ++++++++++++- include/configs/sun8i.h | 2 ++ 5 files changed, 24 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h index 85a4ec3b0e..24f85206c8 100644 --- a/arch/arm/include/asm/arch-sunxi/gpio.h +++ b/arch/arm/include/asm/arch-sunxi/gpio.h @@ -161,6 +161,7 @@ enum sunxi_gpio_number { #define SUN8I_GPB_UART2 2 #define SUN8I_A33_GPB_UART0 3 #define SUN8I_A83T_GPB_UART0 2 +#define SUN8I_V3S_GPB_UART0 3 #define SUN50I_GPB_UART0 4
#define SUNXI_GPC_NAND 2 diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index aa11493748..3b28478e2d 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -110,6 +110,10 @@ static int gpio_init(void) sunxi_gpio_set_cfgpin(SUNXI_GPB(9), SUN8I_A83T_GPB_UART0); sunxi_gpio_set_cfgpin(SUNXI_GPB(10), SUN8I_A83T_GPB_UART0); sunxi_gpio_set_pull(SUNXI_GPB(10), SUNXI_GPIO_PULL_UP); +#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN8I_V3S) + sunxi_gpio_set_cfgpin(SUNXI_GPB(8), SUN8I_V3S_GPB_UART0); + sunxi_gpio_set_cfgpin(SUNXI_GPB(9), SUN8I_V3S_GPB_UART0); + sunxi_gpio_set_pull(SUNXI_GPB(9), SUNXI_GPIO_PULL_UP); #elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN9I) sunxi_gpio_set_cfgpin(SUNXI_GPH(12), SUN9I_GPH_UART0); sunxi_gpio_set_cfgpin(SUNXI_GPH(13), SUN9I_GPH_UART0); @@ -180,10 +184,11 @@ void s_init(void) /* No H3 BSP, boot0 seems to not modify SUNXI_SRAMC_BASE + 0x44 */ #endif
-#if defined CONFIG_MACH_SUN6I || \ +#if (defined CONFIG_MACH_SUN6I || \ defined CONFIG_MACH_SUN7I || \ defined CONFIG_MACH_SUN8I || \ - defined CONFIG_MACH_SUN9I + defined CONFIG_MACH_SUN9I) && \ + !defined CONFIG_MACH_SUN8I_V3S /* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */ asm volatile( "mrc p15, 0, r0, c1, c0, 1\n" diff --git a/arch/arm/mach-sunxi/cpu_info.c b/arch/arm/mach-sunxi/cpu_info.c index f1f6fd5ba4..15f1e0e45a 100644 --- a/arch/arm/mach-sunxi/cpu_info.c +++ b/arch/arm/mach-sunxi/cpu_info.c @@ -87,6 +87,8 @@ int print_cpuinfo(void) printf("CPU: Allwinner A83T (SUN8I %04x)\n", sunxi_get_sram_id()); #elif defined CONFIG_MACH_SUN8I_H3 printf("CPU: Allwinner H3 (SUN8I %04x)\n", sunxi_get_sram_id()); +#elif defined CONFIG_MACH_SUN8I_V3S + printf("CPU: Allwinner V3s (SUN8I %04x)\n", sunxi_get_sram_id()); #elif defined CONFIG_MACH_SUN9I puts("CPU: Allwinner A80 (SUN9I)\n"); #elif defined CONFIG_MACH_SUN50I diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index c11d40ee7e..09af3537b2 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -122,6 +122,17 @@ config MACH_SUN8I_H3 select SUNXI_H3_DW_DRAM select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
+config MACH_SUN8I_V3S + bool "sun8i (Allwinner V3s)" + select CPU_V7 + select CPU_V7_HAS_NONSEC + select CPU_V7_HAS_VIRT + select SUNXI_GEN_SUN6I + select SUPPORT_SPL + select SUNXI_H3_DW_DRAM + select SUNXI_H3_DRAM_DDR2 + select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT + config MACH_SUN9I bool "sun9i (Allwinner A80)" select CPU_V7 @@ -138,7 +149,7 @@ endchoice # The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33" config MACH_SUN8I bool - default y if MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_H3 || MACH_SUN8I_A83T + default y if MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_H3 || MACH_SUN8I_A83T || MACH_SUN8I_V3S
config DRAM_TYPE int "sunxi dram type" diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h index a4c3fb69e4..6ac42acaea 100644 --- a/include/configs/sun8i.h +++ b/include/configs/sun8i.h @@ -21,6 +21,8 @@ #define CONFIG_SUNXI_USB_PHYS 4 #elif defined CONFIG_MACH_SUN8I_A83T #define CONFIG_SUNXI_USB_PHYS 3 +#elif defined CONFIG_MACH_SUN8I_V3S + #define CONFIG_SUNXI_USB_PHYS 1 #else #define CONFIG_SUNXI_USB_PHYS 2 #endif