This patch fixes a typo in the routine to calculate the cs offset based upon the contents of the SDRC cs_cfg register. This function mistakenly shifts the CS1STARTLOW field 17 bits right instead of 17 bits left.
This hasn't been an issue to date because all OMAP3 boards currently are configured to have zeros in this field.
Reported-by: Peter Maydell peter.maydell@linaro.org Signed-off-by: Steve Sakoman steve@sakoman.com ---
diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c index 2719bb5..6c419f5 100644 --- a/arch/arm/cpu/armv7/omap3/sdrc.c +++ b/arch/arm/cpu/armv7/omap3/sdrc.c @@ -99,7 +99,7 @@ u32 get_sdr_cs_offset(u32 cs) return 0;
offset = readl(&sdrc_base->cs_cfg); - offset = (offset & 15) << 27 | (offset & 0x30) >> 17; + offset = (offset & 15) << 27 | (offset & 0x30) << 17;
return offset; }