On 4/29/19 8:32 PM, Simon Goldschmidt wrote:
Booting this board failed as the initial console isn't found since commit c402e8170245 ("dts: arm: socfpga: merge gen5 devicetrees from linux")
The uart0 devicetree entry was missing "clock-frequency = <100000000>:" since that commit
Fixes: c402e8170245 ("dts: arm: socfpga: merge gen5 devicetrees from linux") Reported-by: rafael mello rafaelmello_3@hotmail.com Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com
arch/arm/dts/socfpga_cyclone5_de10_nano.dts | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/socfpga_cyclone5_de10_nano.dts b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts index b620dd8dda..4be4083941 100644 --- a/arch/arm/dts/socfpga_cyclone5_de10_nano.dts +++ b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts @@ -77,6 +77,7 @@ };
&uart0 {
- clock-frequency = <100000000>; u-boot,dm-pre-reloc;
};
Applied, thanks.
While at it, can we do something about Gen5 clock driver ?