On Oct 3, 2011, at 11:19 AM, York Sun wrote:
It is not necessary to keep multiple entries for the same setting in DDR speed tables. Merge them for smaller tables. Also restructure the tables for smaller size. Cleanup some typedefs.
Enforce strict checking for speed table. If DIMM is running at higher than known speed, try to use the highest speed setting. If rank is unknown, it has to panic.
Removed ODT overriding for P2020DS as it is not necessary.
Signed-off-by: York Sun yorksun@freescale.com
board/freescale/corenet_ds/ddr.c | 222 ++++++++++++++++--------------------- board/freescale/mpc8349emds/ddr.c | 80 ++++++++------ board/freescale/mpc8572ds/ddr.c | 203 +++++++++++++++++----------------- board/freescale/mpc8641hpcn/ddr.c | 165 ++++++++++++---------------- board/freescale/p1022ds/ddr.c | 79 +++++++++----- board/freescale/p2020ds/ddr.c | 105 +++++++++-------- board/freescale/p2041rdb/ddr.c | 78 ++++++++----- 7 files changed, 472 insertions(+), 460 deletions(-)
applied to 85xx
- k