On 10/18/24 11:57 PM, Lothar Rubusch wrote:
On Mon, Oct 14, 2024 at 8:42 PM Marek Vasut marex@denx.de wrote:
On 10/13/24 4:32 PM, Lothar Rubusch wrote:
[...]
diff --git a/arch/arm/dts/socfpga_arria10_enclustra_mercury_aa1.dts b/arch/arm/dts/socfpga_arria10_enclustra_mercury_aa1.dts new file mode 100644 index 0000000000..1b29ab9358 --- /dev/null +++ b/arch/arm/dts/socfpga_arria10_enclustra_mercury_aa1.dts @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/*
- Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com
- */
+/dts-v1/;
+/* The arria10 family */ +#include "socfpga/socfpga_arria10_mercury_aa1.dtsi"
+/ {
aliases {ethernet0 = &gmac0;serial0 = &uart0;serial1 = &uart1;i2c0 = &i2c1;i2c1 = &i2c0;spi0 = &qspi;};+};
+&qspi {
bootph-all;status = "okay";flash0: s25fl512s@0 {bootph-all;cdns,page-size = <256>;cdns,block-size = <16>;cdns,tshsl-ns = <200>;cdns,tsd2d-ns = <255>;cdns,tchsh-ns = <20>;cdns,tslch-ns = <20>;};+};
+/* Carrier board support */ +#if IS_ENABLED(CONFIG_ENCLUSTRA_PE1) +# include "socfpga/socfpga_enclustra_mercury_pe1.dtsi" +#elif IS_ENABLED(CONFIG_ENCLUSTRA_PE3) +# include "socfpga/socfpga_enclustra_mercury_pe3.dtsi" +#elif IS_ENABLED(CONFIG_ENCLUSTRA_ST1) +# include "socfpga/socfpga_enclustra_mercury_st1.dtsi" +#endif
Can this be moved to socfpga_arria10_mercury_aa1-u-boot.dtsi instead , as this is likely not going to be part of the upstream socfpga_arria10_mercury_aa1.dts ?
I may try to put more of this content into a ...-u-boot.dtsi and then try to take more advantage out of the u-boot DT generation process. I will have a look on what I could improve to match the u-boot DT generation approach still a bit better.
I was orienting myself a bit by the other arria10 devices there. But I think .dts in dts/upstream will definitely not work with the current approach, and as a .dts file due to this bitstream loading and muxing situation needed to be done in SPL and u-boot only. I'll see if I can figure out.
Thank you !