On 05/11/2017 01:36 AM, Yogesh Gaur wrote:
On LS2081ARDB both QSPI and DSPI are having flash n25q512a of micron family which supports EAR Read/Write cmds, thus enable CONFIG_SPI_FLASH_BAR config. Else only lower 16MiB accessible for these flashes.
Signed-off-by: Yogesh Gaur yogeshnarayan.gaur@nxp.com
Depends on : https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork...
include/configs/ls2080ardb.h | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 6abf54b..08ac9a9 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -299,6 +299,11 @@ unsigned long get_board_sys_clk(void); #ifdef CONFIG_FSL_QSPI #ifdef CONFIG_TARGET_LS2081ARDB #define CONFIG_SPI_FLASH_STMICRO +/*
- On LS2081ARDB both QSPI and DSPI are having flash n25q512a of micron
- family which supports EAR Read/Write cmds, thus enable below config
- */
+#define CONFIG_SPI_FLASH_BAR #else #define CONFIG_SPI_FLASH_SPANSION #endif
Suresh,
Is this impacted by the same QSPI driver you are working on?
York