Am 04.07.2019 um 10:55 schrieb Ley Foon Tan:
Move firewall related code to new firewall.c, to share code in Stratix 10 and Agilex.
No functional change.
Signed-off-by: Ley Foon Tan ley.foon.tan@intel.com
Reviewed-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com
arch/arm/mach-socfpga/Makefile | 1 + arch/arm/mach-socfpga/firewall.c | 97 +++++++++++++++++++ .../mach/{firewall_s10.h => firewall.h} | 10 +- arch/arm/mach-socfpga/spl_s10.c | 84 +--------------- drivers/ddr/altera/sdram_s10.c | 2 +- 5 files changed, 107 insertions(+), 87 deletions(-) create mode 100644 arch/arm/mach-socfpga/firewall.c rename arch/arm/mach-socfpga/include/mach/{firewall_s10.h => firewall.h} (94%)
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile index e66720447f..11370cf4c4 100644 --- a/arch/arm/mach-socfpga/Makefile +++ b/arch/arm/mach-socfpga/Makefile @@ -52,6 +52,7 @@ ifdef CONFIG_TARGET_SOCFPGA_ARRIA10 obj-y += spl_a10.o endif ifdef CONFIG_TARGET_SOCFPGA_STRATIX10 +obj-y += firewall.o obj-y += spl_s10.o endif endif diff --git a/arch/arm/mach-socfpga/firewall.c b/arch/arm/mach-socfpga/firewall.c new file mode 100644 index 0000000000..c67650158a --- /dev/null +++ b/arch/arm/mach-socfpga/firewall.c @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0 +/*
- Copyright (C) 2016-2019 Intel Corporation <www.intel.com>
- */
+#include <asm/io.h> +#include <common.h> +#include <asm/arch/firewall.h>
+static void firewall_l4_per_disable(void) +{
- const struct socfpga_firwall_l4_per *firwall_l4_per_base =
(struct socfpga_firwall_l4_per *)SOCFPGA_FIREWALL_L4_PER;- u32 i;
- const u32 *addr[] = {
&firwall_l4_per_base->nand,&firwall_l4_per_base->nand_data,&firwall_l4_per_base->usb0,&firwall_l4_per_base->usb1,&firwall_l4_per_base->spim0,&firwall_l4_per_base->spim1,&firwall_l4_per_base->emac0,&firwall_l4_per_base->emac1,&firwall_l4_per_base->emac2,&firwall_l4_per_base->sdmmc,&firwall_l4_per_base->gpio0,&firwall_l4_per_base->gpio1,&firwall_l4_per_base->i2c0,&firwall_l4_per_base->i2c1,&firwall_l4_per_base->i2c2,&firwall_l4_per_base->i2c3,&firwall_l4_per_base->i2c4,&firwall_l4_per_base->timer0,&firwall_l4_per_base->timer1,&firwall_l4_per_base->uart0,&firwall_l4_per_base->uart1};- /*
* The following lines of code will enable non-secure access* to nand, usb, spi, emac, sdmmc, gpio, i2c, timers and uart. This* is needed as most OS run in non-secure mode. Thus we need to* enable non-secure access to these peripherals in order for the* OS to use these peripherals.*/- for (i = 0; i < ARRAY_SIZE(addr); i++)
writel(FIREWALL_L4_DISABLE_ALL, addr[i]);+}
+static void firewall_l4_sys_disable(void) +{
- const struct socfpga_firwall_l4_sys *firwall_l4_sys_base =
(struct socfpga_firwall_l4_sys *)SOCFPGA_FIREWALL_L4_SYS;- u32 i;
- const u32 *addr[] = {
&firwall_l4_sys_base->dma_ecc,&firwall_l4_sys_base->emac0rx_ecc,&firwall_l4_sys_base->emac0tx_ecc,&firwall_l4_sys_base->emac1rx_ecc,&firwall_l4_sys_base->emac1tx_ecc,&firwall_l4_sys_base->emac2rx_ecc,&firwall_l4_sys_base->emac2tx_ecc,&firwall_l4_sys_base->nand_ecc,&firwall_l4_sys_base->nand_read_ecc,&firwall_l4_sys_base->nand_write_ecc,&firwall_l4_sys_base->ocram_ecc,&firwall_l4_sys_base->sdmmc_ecc,&firwall_l4_sys_base->usb0_ecc,&firwall_l4_sys_base->usb1_ecc,&firwall_l4_sys_base->clock_manager,&firwall_l4_sys_base->io_manager,&firwall_l4_sys_base->reset_manager,&firwall_l4_sys_base->system_manager,&firwall_l4_sys_base->watchdog0,&firwall_l4_sys_base->watchdog1,&firwall_l4_sys_base->watchdog2,&firwall_l4_sys_base->watchdog3};- for (i = 0; i < ARRAY_SIZE(addr); i++)
writel(FIREWALL_L4_DISABLE_ALL, addr[i]);+}
+static void firewall_bridge_disable(void) +{
- /* disable lwsocf2fpga and soc2fpga bridge security */
- writel(FIREWALL_BRIDGE_DISABLE_ALL, SOCFPGA_FIREWALL_SOC2FPGA);
- writel(FIREWALL_BRIDGE_DISABLE_ALL, SOCFPGA_FIREWALL_LWSOC2FPGA);
+}
+void firewall_setup(void) +{
- firewall_l4_per_disable();
- firewall_l4_sys_disable();
- firewall_bridge_disable();
+} diff --git a/arch/arm/mach-socfpga/include/mach/firewall_s10.h b/arch/arm/mach-socfpga/include/mach/firewall.h similarity index 94% rename from arch/arm/mach-socfpga/include/mach/firewall_s10.h rename to arch/arm/mach-socfpga/include/mach/firewall.h index b96f779f14..516bd1c0e1 100644 --- a/arch/arm/mach-socfpga/include/mach/firewall_s10.h +++ b/arch/arm/mach-socfpga/include/mach/firewall.h @@ -1,11 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0
- Copyright (C) 2017-2018 Intel Corporation <www.intel.com>
*/
- Copyright (C) 2017-2019 Intel Corporation <www.intel.com>
-#ifndef _FIREWALL_S10_ -#define _FIREWALL_S10_ +#ifndef _FIREWALL_H_ +#define _FIREWALL_H_
struct socfpga_firwall_l4_per { u32 nand; /* 0x00 */ @@ -117,4 +117,6 @@ struct socfpga_firwall_l4_sys { #define FW_MPU_DDR_SCR_WRITEL(data, reg) \ writel(data, SOCFPGA_FW_MPU_DDR_SCR_ADDRESS + (reg))
-#endif /* _FIREWALL_S10_ */ +void firewall_setup(void);
+#endif /* _FIREWALL_H_ */ diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c index ec65e1ce64..9209579e17 100644 --- a/arch/arm/mach-socfpga/spl_s10.c +++ b/arch/arm/mach-socfpga/spl_s10.c @@ -12,7 +12,7 @@ #include <image.h> #include <spl.h> #include <asm/arch/clock_manager.h> -#include <asm/arch/firewall_s10.h> +#include <asm/arch/firewall.h> #include <asm/arch/mailbox_s10.h> #include <asm/arch/reset_manager.h> #include <asm/arch/system_manager.h> @@ -41,80 +41,6 @@ u32 spl_boot_mode(const u32 boot_device) } #endif
-void spl_disable_firewall_l4_per(void) -{
- const struct socfpga_firwall_l4_per *firwall_l4_per_base =
(struct socfpga_firwall_l4_per *)SOCFPGA_FIREWALL_L4_PER;- u32 i;
- const u32 *addr[] = {
&firwall_l4_per_base->nand,&firwall_l4_per_base->nand_data,&firwall_l4_per_base->usb0,&firwall_l4_per_base->usb1,&firwall_l4_per_base->spim0,&firwall_l4_per_base->spim1,&firwall_l4_per_base->emac0,&firwall_l4_per_base->emac1,&firwall_l4_per_base->emac2,&firwall_l4_per_base->sdmmc,&firwall_l4_per_base->gpio0,&firwall_l4_per_base->gpio1,&firwall_l4_per_base->i2c0,&firwall_l4_per_base->i2c1,&firwall_l4_per_base->i2c2,&firwall_l4_per_base->i2c3,&firwall_l4_per_base->i2c4,&firwall_l4_per_base->timer0,&firwall_l4_per_base->timer1,&firwall_l4_per_base->uart0,&firwall_l4_per_base->uart1};- /*
* The following lines of code will enable non-secure access* to nand, usb, spi, emac, sdmmc, gpio, i2c, timers and uart. This* is needed as most OS run in non-secure mode. Thus we need to* enable non-secure access to these peripherals in order for the* OS to use these peripherals.*/- for (i = 0; i < ARRAY_SIZE(addr); i++)
writel(FIREWALL_L4_DISABLE_ALL, addr[i]);-}
-void spl_disable_firewall_l4_sys(void) -{
- const struct socfpga_firwall_l4_sys *firwall_l4_sys_base =
(struct socfpga_firwall_l4_sys *)SOCFPGA_FIREWALL_L4_SYS;- u32 i;
- const u32 *addr[] = {
&firwall_l4_sys_base->dma_ecc,&firwall_l4_sys_base->emac0rx_ecc,&firwall_l4_sys_base->emac0tx_ecc,&firwall_l4_sys_base->emac1rx_ecc,&firwall_l4_sys_base->emac1tx_ecc,&firwall_l4_sys_base->emac2rx_ecc,&firwall_l4_sys_base->emac2tx_ecc,&firwall_l4_sys_base->nand_ecc,&firwall_l4_sys_base->nand_read_ecc,&firwall_l4_sys_base->nand_write_ecc,&firwall_l4_sys_base->ocram_ecc,&firwall_l4_sys_base->sdmmc_ecc,&firwall_l4_sys_base->usb0_ecc,&firwall_l4_sys_base->usb1_ecc,&firwall_l4_sys_base->clock_manager,&firwall_l4_sys_base->io_manager,&firwall_l4_sys_base->reset_manager,&firwall_l4_sys_base->system_manager,&firwall_l4_sys_base->watchdog0,&firwall_l4_sys_base->watchdog1,&firwall_l4_sys_base->watchdog2,&firwall_l4_sys_base->watchdog3};- for (i = 0; i < ARRAY_SIZE(addr); i++)
writel(FIREWALL_L4_DISABLE_ALL, addr[i]);-}
- void board_init_f(ulong dummy) { const struct cm_config *cm_default_cfg = cm_get_default_config();
@@ -158,13 +84,7 @@ void board_init_f(ulong dummy) writel(SYSMGR_DMA_IRQ_NS | SYSMGR_DMA_MGR_NS, &sysmgr_regs->dma); writel(SYSMGR_DMAPERIPH_ALL_NS, &sysmgr_regs->dma_periph);
- spl_disable_firewall_l4_per();
- spl_disable_firewall_l4_sys();
- /* disable lwsocf2fpga and soc2fpga bridge security */
- writel(FIREWALL_BRIDGE_DISABLE_ALL, SOCFPGA_FIREWALL_SOC2FPGA);
- writel(FIREWALL_BRIDGE_DISABLE_ALL, SOCFPGA_FIREWALL_LWSOC2FPGA);
firewall_setup();
/* disable SMMU security */ writel(FIREWALL_L4_DISABLE_ALL, SOCFPGA_FIREWALL_TCU);
diff --git a/drivers/ddr/altera/sdram_s10.c b/drivers/ddr/altera/sdram_s10.c index 56cbbac9fe..a211635c2b 100644 --- a/drivers/ddr/altera/sdram_s10.c +++ b/drivers/ddr/altera/sdram_s10.c @@ -13,7 +13,7 @@ #include <reset.h> #include "sdram_s10.h" #include <wait_bit.h> -#include <asm/arch/firewall_s10.h> +#include <asm/arch/firewall.h> #include <asm/arch/system_manager.h> #include <asm/arch/reset_manager.h> #include <asm/io.h>