A recent debug revealed MMU for DDR shouldn't be enabled before DDR is initialized. Otherwise, a "normal memory" mapping may cause speculative access which may hang the system if accessing to DDR is not allowed at time. For Layerscape platforms, we have early MMU setup to speed up execution on emulators. The solution is to update MMU after DDR is ready. The same idea goes to final MMU as well. Actual DDR size is used to create the mappings. Non-exist address should be marked as "fault", i.e. invalid to avoid unwanted speculative access. Break-before-make process is followed when change is made for MMU.
Aside from the DDR size, reserved memory used for secure RAM and Management Complex (MC) makes things more complicated. To simplify it, a new global is added to track the reserved RAM. Secure RAM is excluded from U-Boot MMU. The reserved RAM is still mapped under U-Boot since we will need to copy data into it. Reserved RAM is excluded when device tree is fixed up so OS won't see it. An SoC level efi_add_known_memory() is implemented to add valid memory banks. DP-DDR is not added as memory.
Some MC configurations are moved to Kconfig.
Verified on LS2080ARDB with regular Linux boot and distro boot from USB.
Changes in v5: Rename RESV_RAM_TOP to RESV_RAM in Kconfig Revise "help" message and add comment to explain how RESV_RAM is used.
Changes in v4: Revert the change of C bit in v3 patch.
Changes in v3: Instead of flushing d-cache, following the break-before-make process to change MMU table. Add a patch to drop early MMU setup for LS2080A SPL build.
Changes in v2: Add change to efi mapping Implement SoC level efi_add_known_memory(). DP-DDR is skipped so no need to add it as reserved memory later.
York Sun (11): armv8: Add global variable resv_ram armv8: ls2080a: Move CONFIG_FSL_MC_ENET to Kconfig armv8: ls2080a: Move CONFIG_SYS_MC_RSV_MEM_ALIGN to Kconfig efi: Add a hook to allow adding memory mapping armv8: layerscape: Rewrite memory reservation driver: net: fsl-mc: Update calculation of MC RAM armv8: layerscape: Update MMU mapping with actual DDR size armv8: layerscape: Fix the sequence of changing MMU table armv8: ls2080a: Drop early MMU for SPL build armv8: mmu: Add a function to change mapping attributes armv8: layerscape: Update early MMU for DDR after initialization
arch/arm/cpu/armv8/cache_v8.c | 72 ++++- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 26 ++ arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 331 ++++++++++++++++++++-- arch/arm/cpu/armv8/fsl-layerscape/spl.c | 3 - arch/arm/include/asm/arch-fsl-layerscape/config.h | 4 +- arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 12 +- arch/arm/include/asm/arch-fsl-layerscape/mmu.h | 2 +- arch/arm/include/asm/armv8/mmu.h | 5 + arch/arm/include/asm/global_data.h | 7 + arch/arm/include/asm/system.h | 1 + board/freescale/ls1012afrdm/ls1012afrdm.c | 34 +-- board/freescale/ls1012aqds/ls1012aqds.c | 34 +-- board/freescale/ls1012ardb/ls1012ardb.c | 34 +-- board/freescale/ls1043aqds/ddr.c | 29 -- board/freescale/ls1043aqds/ls1043aqds.c | 5 + board/freescale/ls1043ardb/ddr.c | 29 -- board/freescale/ls1043ardb/ls1043ardb.c | 7 - board/freescale/ls1046aqds/ddr.c | 29 -- board/freescale/ls1046aqds/ls1046aqds.c | 5 + board/freescale/ls1046ardb/ddr.c | 29 -- board/freescale/ls1046ardb/ls1046ardb.c | 7 - board/freescale/ls2080a/ddr.c | 55 ---- board/freescale/ls2080a/ls2080a.c | 17 +- board/freescale/ls2080aqds/ddr.c | 55 ---- board/freescale/ls2080aqds/ls2080aqds.c | 17 +- board/freescale/ls2080ardb/ddr.c | 55 ---- board/freescale/ls2080ardb/ls2080ardb.c | 26 +- cmd/bdinfo.c | 4 + common/board_f.c | 32 +-- drivers/net/fsl-mc/mc.c | 75 +---- include/configs/ls2080a_common.h | 2 - lib/efi_loader/efi_memory.c | 14 +- scripts/config_whitelist.txt | 2 - 33 files changed, 519 insertions(+), 540 deletions(-)