Hello Christian,
Christian Riesch wrote:
Signed-off-by: Christian Riesch christian.riesch@omicron.at Cc: Heiko Schocher hs@denx.de Cc: Sandeep Paulraj s-paulraj@ti.com Cc: Sudhakar Rajashekhara sudhakar.raj@ti.com
board/davinci/da8xxevm/da850evm.c | 4 +- board/davinci/da8xxevm/u-boot-spl.lds | 73 +++++++++++++++++++++++++++++++++ include/configs/da850evm.h | 53 ++++++++++++++++++++++++ 3 files changed, 129 insertions(+), 1 deletions(-) create mode 100644 board/davinci/da8xxevm/u-boot-spl.lds
[...]
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 2e2aa19..23eed0f 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -65,6 +65,41 @@ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define CONFIG_STACKSIZE (256*1024) /* regular stack */
+#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ((1 << 27) | (1 << 22) | (1 << 20) | \
(1 << 5) | (1 << 16))
Please use here the DAVINCI_SYSCFG_SUSPSRC_* defines from arch/arm/include/asm/arch-davinci/hardware.h
+/*
- PLL configuration
- */
+#define CONFIG_SYS_DV_CLKMODE 0 +#define CONFIG_SYS_DA850_PLL0_POSTDIV 1 +#define CONFIG_SYS_DA850_PLL0_PLLDIV1 0x8000 +#define CONFIG_SYS_DA850_PLL0_PLLDIV2 0x8001 +#define CONFIG_SYS_DA850_PLL0_PLLDIV3 0x8002 +#define CONFIG_SYS_DA850_PLL0_PLLDIV4 0x8003 +#define CONFIG_SYS_DA850_PLL0_PLLDIV5 0x8002 +#define CONFIG_SYS_DA850_PLL0_PLLDIV6 CONFIG_SYS_DA850_PLL0_PLLDIV1 +#define CONFIG_SYS_DA850_PLL0_PLLDIV7 0x8005
+#define CONFIG_SYS_DA850_PLL1_POSTDIV 1 +#define CONFIG_SYS_DA850_PLL1_PLLDIV1 0x8000 +#define CONFIG_SYS_DA850_PLL1_PLLDIV2 0x8001 +#define CONFIG_SYS_DA850_PLL1_PLLDIV3 0x8002
+#define CONFIG_SYS_DA850_PLL0_PLLM 24 +#define CONFIG_SYS_DA850_PLL1_PLLM 21
+/*
- DDR2 memory configuration
- */
+#define CONFIG_SYS_DA850_DDR2_DDRPHYCR 0x000000C4 +#define CONFIG_SYS_DA850_DDR2_SDBCR 0x0A034622 +#define CONFIG_SYS_DA850_DDR2_SDBCR2 0x00000000 +#define CONFIG_SYS_DA850_DDR2_SDTIMR 0x184929C8 +#define CONFIG_SYS_DA850_DDR2_SDTIMR2 0xB80FC700 +#define CONFIG_SYS_DA850_DDR2_SDRCR 0x00000406
Could you use here the DV_DDR_* defines from arch/arm/include/asm/arch-davinci/ddr2_defs.h
+#define CONFIG_SYS_DA850_DDR2_PBBPR 0x30
/*
- Serial Driver info
*/ @@ -76,6 +111,7 @@ #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ #define CONFIG_BAUDRATE 115200 /* Default baud rate */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#define CONFIG_SYS_DA850_LPSC_UART DAVINCI_LPSC_UART2
#define CONFIG_SPI #define CONFIG_SPI_FLASH @@ -242,6 +278,23 @@ #undef CONFIG_CMD_ENV #endif
+/* defines for SPL */ +#define CONFIG_SPL +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_LDSCRIPT "$(BOARDDIR)/u-boot-spl.lds" +#define CONFIG_SPL_STACK 0x8001ff00 +#define CONFIG_SPL_TEXT_BASE 0x80000000 +#define CONFIG_SPL_MAX_SIZE 32768 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 +#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x30000
/* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
Could you use here some space from On-Chip RAM?
bye, Heiko