On 28/09/2014 04:19, Marek Vasut wrote:
On Wednesday, September 24, 2014 at 06:57:06 PM, Sean Cross wrote:
[...]
+#define NOVENA_AUDIO_PWRON IMX_GPIO_NR(5, 17) +#define NOVENA_HDMI_GHOST_HPD IMX_GPIO_NR(5, 4) +#define NOVENA_PCIE_RESET_GPIO IMX_GPIO_NR(3, 29) +#define NOVENA_PCIE_POWER_ON_GPIO IMX_GPIO_NR(7, 12) +#define NOVENA_PCIE_WAKE_UP_GPIO IMX_GPIO_NR(3, 22) +#define NOVENA_PCIE_DISABLE_GPIO IMX_GPIO_NR(2, 16)
Add NOVENA_FPGA_RESET_N_GPIO IMX_GPIO_NR(5, 7). If the FPGA has a program loaded that doesn't let the I2C pins float, then the DDR3 SPD will be unable to be read.
Added and I am now setting this GPIO to 0 so the FPGA is in reset throughout the SPL operation. It can be brought out of reset in U-Boot itself and only when it's actually used, right ?
Correct. You can leave the FPGA in reset forever. If it is configured in U-Boot, then it can be brought back out of reset.
- /* UART clocks enabled and gd valid - init serial console */
- preloader_console_init();
- /* Start the DDR DRAM */
- mx6dq_dram_iocfg(64, &novena_ddr_ioregs, &novena_grp_ioregs);
- mx6_dram_cfg(&novena_ddr_info, &novena_mmdc_calib, &elpida_4gib_1600);
- /* Clear the BSS. */
- memset(__bss_start, 0, __bss_end - __bss_start);
- /* load/boot image from boot device */
- board_init_r(NULL, 0);
+}
+void reset_cpu(ulong addr) +{ +}
[...]
We just received final boards on Monday. I will try this out and report back.
You should try one of the never patches .
I have built it and gotten it working on Novena. A few notes:
USB works, but appears to take a very long time to enumerate. I suspect one of the hubs is still in reset. It finds the Asix Ethernet device, but doesn't find a USB keyboard I have plugged in. Instead, running "usb start" gives "EHCI timed out on TD - token=0x80008c80", and the keyboard shows up as "Hub (12 Mb/s, 40mA) -- Lite-On Tech USB 1.1 2 port downstream low-p".
The Ethernet address is obtained correctly from the EEPROM.
HDMI works.
SATA works.
FEC Ethernet can get an IP address.