This patch is the phycore part of Maxim Artamonov's NAND SPL on phycore patch.
The note below is from the original patch.
Note: By default, Phytec phyCORE-i.MX31 board (pcm-037 and pcm-970) is not suitable for nand-bootloading, because of SW5 switchers block haven't appropriate modes (8-bit, 2k page or 16-bit, 512 page) for BOOTPINS[4:0] and nand-flash (8-bit mode, 512B page) contemporary. There is require to make RESOLDER for really nand-booting either BOOTPIN state or JN1/2 and RN41/42.
The original patch was signed-off-by Maxim Artamonov <scn1874 at yandex.ru >. --- MAKEALL | 1 + Makefile | 9 ++++++++- board/imx31_phycore/config.mk | 10 ++++++++++ board/imx31_phycore/lowlevel_init.S | 26 ++++++++++++++++++++++++++ include/configs/imx31_phycore.h | 33 +++++++++++++++++++++++++++++++++ 5 files changed, 78 insertions(+), 1 deletions(-)
diff --git a/MAKEALL b/MAKEALL index 854f303..94ad389 100755 --- a/MAKEALL +++ b/MAKEALL @@ -547,6 +547,7 @@ LIST_ARM11=" \ imx31_litekit \ imx31_phycore \ imx31_phycore_eet \ + imx31_phycore_nand \ mx31ads \ qong \ smdk6400 \ diff --git a/Makefile b/Makefile index f857641..f0981ce 100644 --- a/Makefile +++ b/Makefile @@ -367,7 +367,7 @@ $(NAND_SPL): $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk $(MAKE) -C nand_spl/board/$(BOARDDIR) all
$(U_BOOT_NAND): $(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk - cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin + cat $(obj)nand_spl/u-boot-spl-aligned.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
$(ONENAND_IPL): $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk $(MAKE) -C onenand_ipl/board/$(BOARDDIR) all @@ -3071,6 +3071,13 @@ imx31_phycore_config : unconfig fi @$(MKCONFIG) -a imx31_phycore arm arm1136 imx31_phycore NULL mx31
+imx31_phycore_nand_config : unconfig + @mkdir -p $(obj)include $(obj)board/imx31_phycore + @mkdir -p $(obj)nand_spl/board/imx31_phycore + @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h + @$(MKCONFIG) -n $@ -a imx31_phycore arm arm1136 imx31_phycore NULL mx31 + @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk + mx31ads_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads freescale mx31
diff --git a/board/imx31_phycore/config.mk b/board/imx31_phycore/config.mk index d34dc02..412defc 100644 --- a/board/imx31_phycore/config.mk +++ b/board/imx31_phycore/config.mk @@ -1 +1,11 @@ +# +# (C) Copyright 2008 +# was changed by Maxim Artamonov, <scn1874 at yandex.ru> +# + +ifndef CONFIG_NAND_SPL TEXT_BASE = 0x87f00000 +else +TEXT_BASE = 0x87ec0000 +endif + diff --git a/board/imx31_phycore/lowlevel_init.S b/board/imx31_phycore/lowlevel_init.S index c5d6eb0..0733240 100644 --- a/board/imx31_phycore/lowlevel_init.S +++ b/board/imx31_phycore/lowlevel_init.S @@ -1,5 +1,8 @@ /* * + * (C) Copyright 2008 + * Maxim Artamonov, <scn1874 at yandex.ru> + * * (c) 2007 Pengutronix, Sascha Hauer s.hauer@pengutronix.de * * See file CREDITS for list of people who contributed to this @@ -43,6 +46,20 @@ bcs 1b .endm
+#ifdef CONFIG_NAND_SPL +/* somewhat macro to reduce bin size for CONFIG_NAND_SPL*/ +.macro FILLREGS begreg, val, count, step + ldr r2, =\begreg + ldr r3, =\val + ldr r4, =\count +2: + str r3, [r2] + add r2, r2, #\step + subs r4, r4, #1 + bcs 2b +.endm +#endif + .globl lowlevel_init lowlevel_init:
@@ -60,10 +77,18 @@ lowlevel_init:
REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(0x43) | PLL_MFI(12) | PLL_MFN(1)
+#ifdef CONFIG_NAND_SPL + FILLREGS 0x43FAC26C, 0, 0x3, 0x4 +#else REG 0x43FAC26C, 0 /* SDCLK */ REG 0x43FAC270, 0 /* CAS */ REG 0x43FAC274, 0 /* RAS */ +#endif /* CONFIG_NAND_SPL */ REG 0x43FAC27C, 0x1000 /* CS2 (CSD0) */ + +#ifdef CONFIG_NAND_SPL + FILLREGS 0x43FAC284, 0, 0x17, 0x4 +#else REG 0x43FAC284, 0 /* DQM3 */ REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2DC) */ REG 0x43FAC28C, 0 @@ -87,6 +112,7 @@ lowlevel_init: REG 0x43FAC2D4, 0 REG 0x43FAC2D8, 0 REG 0x43FAC2DC, 0 +#endif /* CONFIG_NAND_SPL */ REG 0xB8001010, 0x00000004 REG 0xB8001004, 0x006ac73a REG 0xB8001000, 0x92100000 diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h index cbc0b92..dbe415b 100644 --- a/include/configs/imx31_phycore.h +++ b/include/configs/imx31_phycore.h @@ -1,4 +1,7 @@ /* + * (C) Copyright 2008 + * Maxim Artamonov, <scn1874 at yandex.ru> + * * (C) Copyright 2004 * Texas Instruments. * Richard Woodruff r-woodruff2@ti.com @@ -34,6 +37,11 @@ #define CONFIG_MX31_HCLK_FREQ 26000000 #define CONFIG_MX31_CLK32 32000
+#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT +#endif + #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
@@ -172,6 +180,31 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ #define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Write */
+/*----------------------------------------------------------------------- + * NAND flash + */ + +#define NAND_MAX_CHIPS 1 +#define CFG_MAX_NAND_DEVICE 1 +#define CFG_NAND_BASE 0x40000000 + +/* + * Because of small buffer size of NFC in iMX31, SPL has to fit into 2kB. + */ + +/*CFG_NAND_U_BOOT_OFFS and CFG_NAND_U_BOOT_SIZE must be align to full pages*/ +#define CFG_NAND_U_BOOT_OFFS 0x800 +#define CFG_NAND_U_BOOT_SIZE 0x30000 +#define CFG_NAND_U_BOOT_DST 0x87f00000 /* Load big U-Boot to this addr */ +#define CFG_NAND_U_BOOT_START CFG_NAND_U_BOOT_DST /* Start big U-Boot from */ +#define CFG_NAND_SPL_DST CFG_NAND_U_BOOT_DST-0x40000 /* Relocate NAND_SPL to this adress*/ + +#define CFG_NAND_PAGE_SIZE 0x200 +#define CFG_NAND_BLOCK_SIZE 0x4000 +#define CFG_NAND_PAGES_PER_BLOCK 0x20 +/*for NAND_SPL*/ +#define CFG_NAND_CHIP_SIZE 0x4000000 + /* * JFFS2 partitions */