After commit [1] I noticed a problem with the HW ECC no longer working. After looking into it I found that there was a typo that caused the ecc registers to be shifted by 4 bytes. The patch attached corrects the issue, I have verified this on an OSWALD board (for more information about OSWALD see [2]).
[1] http://git.denx.de/?p=u-boot.git;a=commit;h=187af954cf7958c24efcf0fd62289bbd... [2] http://beaversource.oregonstate.edu/projects/cspfl
Ben Goska Oregon State University goskab@onid.oregonstate.edu
From aca1e8e7bfeb02e3ac5a5e5eb3704144e43dbc5b Mon Sep 17 00:00:00 2001
From: Ben Goska goskab@onid.oregonstate.edu Date: Thu, 13 Aug 2009 10:32:56 -0700 Subject: [PATCH] omap3: Fixed a problem with hwecc
In commit 187af954cf7958c24efcf0fd62289bbdb4f1f24e there was a typo that offset all the ecc registers by 4 bytes, fixed that. (cherry picked from commit f06dc3609e73f496a21699b54d37e93af5de9418) --- include/asm-arm/arch-omap3/cpu.h | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/asm-arm/arch-omap3/cpu.h b/include/asm-arm/arch-omap3/cpu.h index 7a032b8..8ab2e39 100644 --- a/include/asm-arm/arch-omap3/cpu.h +++ b/include/asm-arm/arch-omap3/cpu.h @@ -120,9 +120,9 @@ struct gpmc { u8 res4[0xC]; u32 config; /* 0x50 */ u32 status; /* 0x54 */ - u8 res5[0x8]; + u8 res5[0x8]; /* 0x58 */ struct gpmc_cs cs[8]; /* 0x60, 0x90, .. */ - u8 res6[0x18]; + u8 res6[0x14]; /* 0x1E0 */ u32 ecc_config; /* 0x1F4 */ u32 ecc_control; /* 0x1F8 */ u32 ecc_size_config; /* 0x1FC */