On 01/17/2017 02:44 AM, Zhiqiang Hou wrote:
From: Wenbin Song wenbin.song@nxp.com
The LS1043A rev1.1 silicon supports two types of GIC offset: 4K alignment and 64K alignment. The bit SCFG_GIC400_ALIGN[GIC_ADDR_BIT] is used to choose which offset will be used.
The LS1043A rev1.0 silicon only supports the CIG offset with 4K alignment.
If GIC_ADDR_BIT bit is set, 4K alignment is used, or else 64K alignment is used. 64K alignment is the default setting.
Overriding the weak smp_kick_all_cpus, the new impletment is able to detect GIC offset.
The default GIC offset in kernel device tree is using 4K alignment, it need to be fixed if 64K alignment is detected.
Signed-off-by: Wenbin Song wenbin.song@nxp.com Signed-off-by: Mingkai Hu mingkai.hu@nxp.com Signed-off-by: Hou Zhiqiang Zhiqiang.Hou@nxp.com
V8:
- Fixed a compile error for ls2080.
- Removed the duplicated definition of ls1043a SVR.
This set is applied to fsl-qoriq master, awaiting upstream. Thanks.
York