On Thu, Mar 15, 2012 at 1:44 AM, Prabhakar Kushwaha prabhakar@freescale.com wrote:
+#include <common.h> +#include <asm/processor.h> +#include <asm/mmu.h> +#include <asm/cache.h> +#include <asm/immap_85xx.h> +#include <asm/io.h> +#include <miiphy.h> +#include <libfdt.h> +#include <fdt_support.h> +#include <fsl_mdio.h> +#include <tsec.h> +#include <netdev.h>
+DECLARE_GLOBAL_DATA_PTR;
+int board_early_init_f(void) +{
- ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
- clrbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_CTS_B0_GPIO42);
- setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_CTS_B0_DSP_TMS);
- clrbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_RTS_B0_GPIO43);
- setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_RTS_B0_DSP_TCK |
- MPC85xx_PMUXCR2_UART_CTS_B1_SIM_PD);
- setbits_be32(HALTED_TO_HALT_REQ_MASK_REG, HALTED_TO_HALT_REQ_MASK_0);
Based on my previous comments, this would change to &gur->halt_req_mask.
- clrsetbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_IFC_AD_GPIO_MASK |
- MPC85xx_PMUXCR_IFC_AD17_GPO_MASK,
- MPC85xx_PMUXCR_IFC_AD_GPIO |
- MPC85xx_PMUXCR_IFC_AD17_GPO | MPC85xx_PMUXCR_SDHC_USIM);
- return 0;
+}
+#ifdef CONFIG_TSEC_ENET +int board_eth_init(bd_t *bis) +{
- struct fsl_pq_mdio_info mdio_info;
- struct tsec_info_struct tsec_info[2];
- int num = 0;
+#ifdef CONFIG_TSEC1
- SET_STD_TSEC_INFO(tsec_info[num], 1);
- num++;
+#endif
+#ifdef CONFIG_TSEC2
- SET_STD_TSEC_INFO(tsec_info[num], 2);
- num++;
+#endif
- if (!num) {
- printf("No TSECs initialized\n");
- return 0;
- }
- mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR;
- mdio_info.name = DEFAULT_MII_NAME;
- fsl_pq_mdio_init(bis, &mdio_info);
- tsec_eth_init(bis, tsec_info, num);
- return num;
+} +#endif
You don't need this function at all, as it appears you are using all standard settings. tsec_standard_init() will set up the driver the same way as above, and cpu_eth_init() will call that. You only need a board-ethernet init function if there's something special about the board that causes ethernet initialization to be non-standard.
Andy