Hi Rick,
On Tue, May 11, 2021 at 8:49 AM Rick Chen rickchen36@gmail.com wrote:
Hi Bin,
Hi Rick,
On Mon, May 10, 2021 at 3:22 PM Rick Chen rickchen36@gmail.com wrote:
Hi Bin
Hi Bin,
From: Bin Meng bmeng.cn@gmail.com Sent: Monday, May 10, 2021 2:58 PM To: Simon Glass sjg@chromium.org; Rick Jian-Zhi Chen(陳建志) rick@andestech.com; u-boot@lists.denx.de Subject: [PATCH v4 00/13] riscv: Switch to use binman to generate u-boot.itb
This series updates binman to handle creation of u-boot.itb image for RISC-V boards.
Azure results: PASS https://dev.azure.com/bmeng/GitHub/_build/results?buildId=363&view=resul...
The following tests were performed:
- booting qemu-riscv{32|64}_spl_defconfig on QEMU virt
- booting sifive_unleashed_defconfig on QEMU sifive_u
AE350 SPL defconfigs are not tested. @Rick, could you please test and report?
OK. I will verify it on AE350.
It fail as below messages:
U-Boot SPL 2021.07-rc1-00218-g468b3b3 (May 10 2021 - 15:13:03 +0800) Trying to boot from RAM alloc space exhausted
Looks it is running out of memory.
Could not get FIT buffer of 499076 bytes check CONFIG_SYS_SPL_MALLOC_SIZE
Could you please try increasing CONFIG_SYS_SPL_MALLOC_SIZE?
I increased CONFIG_SYS_SPL_MALLOC_SIZE, but it is useless. But it boots successfully after increase CONFIG_SPL_SYS_MALLOC_F_LEN larger.
Thanks for testing. I am not sure why AE350 fails to boot because this series only changes the way to assemble the bits.
Could you please confirm if without this patch series, AE350 can boot?
OK.
Regards, Bin