In message 47D8F658.90001@gaisler.com you wrote:
This patch makes SPARC/LEON processors able to read and write to the SMC91111 chip using the chip external I/O bus of the memory controller. This patchs defines the standard in and out macros expected by the SMC9111 driver.
To access that I/O bus one must set up the memory controller (MCTRL or FTMCTRL) correctly. It is assumed that the user sets up this correctly when the other MCTRL parameters are set up. It can be set up from the board configuration header file.
Best Regards, Daniel Hellstrom
drivers/net/smc91111.h | 74 +++++++++++++++++++++++++++++++++++++++++++++++- 1 files changed, 73 insertions(+), 1 deletions(-)
diff --git a/drivers/net/smc91111.h b/drivers/net/smc91111.h index d03cbc3..8d3976a 100644 --- a/drivers/net/smc91111.h +++ b/drivers/net/smc91111.h @@ -176,7 +176,79 @@ typedef unsigned long int dword; }; \ })
-#else /* if not CONFIG_PXA250 */ +#elif defined(CONFIG_LEON) /* if not CONFIG_PXA250 */
+#define SMC_LEON_SWAP16(_x_) \
- ({ word _x = (_x_); ((_x << 8) | (_x >> 8)); })
+#define SMC_LEON_SWAP32(_x_) \
- ({ dword _x = (_x_); \
((_x << 24) | \((0x0000FF00UL & _x) << 8) | \((0x00FF0000UL & _x) >> 8) | \(_x >> 24)); })+#define SMC_inl(r) (SMC_LEON_SWAP32((*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0))))) +#define SMC_inl_nosw(r) ((*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0)))) +#define SMC_inw(r) (SMC_LEON_SWAP16((*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0))))) +#define SMC_inw_nosw(r) ((*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0)))) +#define SMC_inb(p) ({ \
- word ___v = SMC_inw((p) & ~1); \
- if (p & 1) ___v >>= 8; \
- else ___v &= 0xff; \
- ___v; })
Line wrapped, indentation not by TAB nor in columns of 8, plus more coding style issues.
Best regards,
Wolfgang Denk