On Wed, 2013-10-30 at 19:07 -0700, York Sun wrote:
Make PowerPC specific code conditional so ARM SoCs can reuse this driver. Add DDR3 driver for ARM.
Signed-off-by: York Sun yorksun@freescale.com
drivers/ddr/fsl/Makefile | 1 + drivers/ddr/fsl/arm_ddr_gen3.c | 213 ++++++++++++++++++++++++++++++++++++++++ drivers/ddr/fsl/main.c | 12 ++- drivers/ddr/fsl/util.c | 4 + 4 files changed, 227 insertions(+), 3 deletions(-) create mode 100644 drivers/ddr/fsl/arm_ddr_gen3.c
diff --git a/drivers/ddr/fsl/Makefile b/drivers/ddr/fsl/Makefile index cbbd178..381ec6c 100644 --- a/drivers/ddr/fsl/Makefile +++ b/drivers/ddr/fsl/Makefile @@ -34,6 +34,7 @@ COBJS-$(CONFIG_SYS_FSL_DDR_PPC_GEN1) += mpc85xx_ddr_gen1.o COBJS-$(CONFIG_SYS_FSL_DDR_PPC_GEN2) += mpc85xx_ddr_gen2.o COBJS-$(CONFIG_SYS_FSL_DDR_PPC_GEN3) += mpc85xx_ddr_gen3.o COBJS-$(CONFIG_SYS_FSL_DDR_86XX) += mpc86xx_ddr.o +COBJS-$(CONFIG_SYS_FSL_DDR_ARM_GEN3) += arm_ddr_gen3.o COBJS-$(CONFIG_FSL_DDR_INTERACTIVE) += interactive.o
I'm confused -- is this hardware the same across CPU families or not?
-Scott