Add support for HSSPI controller in ARMv8 chip dts files.
Port from linux patch: Link: https://lore.kernel.org/r/20230207065826.285013-5-william.zhang@broadcom.com Signed-off-by: William Zhang william.zhang@broadcom.com ---
Changes in v3: None Changes in v2: None
arch/arm/dts/bcm4908.dtsi | 17 +++++++++++++++++ arch/arm/dts/bcm4912.dtsi | 20 ++++++++++++++++++++ arch/arm/dts/bcm63146.dtsi | 19 +++++++++++++++++++ arch/arm/dts/bcm63158.dtsi | 15 ++++++--------- arch/arm/dts/bcm6813.dtsi | 20 ++++++++++++++++++++ arch/arm/dts/bcm6856.dtsi | 23 ++++++++++------------- arch/arm/dts/bcm6858.dtsi | 23 ++++++++++------------- arch/arm/dts/bcm94908.dts | 4 ++++ arch/arm/dts/bcm94912.dts | 4 ++++ arch/arm/dts/bcm963146.dts | 4 ++++ arch/arm/dts/bcm963158.dts | 4 ++++ arch/arm/dts/bcm96813.dts | 4 ++++ arch/arm/dts/bcm96856.dts | 4 ++++ arch/arm/dts/bcm96858.dts | 4 ++++ 14 files changed, 130 insertions(+), 35 deletions(-)
diff --git a/arch/arm/dts/bcm4908.dtsi b/arch/arm/dts/bcm4908.dtsi index 0be5cfeeffa9..fc9874623b18 100644 --- a/arch/arm/dts/bcm4908.dtsi +++ b/arch/arm/dts/bcm4908.dtsi @@ -106,6 +106,12 @@ clock-frequency = <50000000>; clock-output-names = "periph"; }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <400000000>; + }; };
bus@ff800000 { @@ -123,5 +129,16 @@ status = "disabled"; };
+ hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm4908-hsspi", "brcm,bcmbca-hsspi-v1.0"; + reg = <0x1000 0x600>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; }; }; diff --git a/arch/arm/dts/bcm4912.dtsi b/arch/arm/dts/bcm4912.dtsi index 3d016c2ce675..b10a0ae06187 100644 --- a/arch/arm/dts/bcm4912.dtsi +++ b/arch/arm/dts/bcm4912.dtsi @@ -78,6 +78,7 @@ #clock-cells = <0>; clock-frequency = <200000000>; }; + uart_clk: uart-clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; @@ -85,6 +86,12 @@ clock-div = <4>; clock-mult = <1>; }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; };
psci { @@ -116,6 +123,19 @@ #size-cells = <1>; ranges = <0x0 0x0 0xff800000 0x800000>;
+ hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm4912-hsspi", "brcm,bcmbca-hsspi-v1.1"; + reg = <0x1000 0x600>, <0x2610 0x4>; + reg-names = "hsspi", "spim-ctrl"; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/dts/bcm63146.dtsi b/arch/arm/dts/bcm63146.dtsi index 04de96bd0a03..48226cf1a7d4 100644 --- a/arch/arm/dts/bcm63146.dtsi +++ b/arch/arm/dts/bcm63146.dtsi @@ -59,6 +59,7 @@ #clock-cells = <0>; clock-frequency = <200000000>; }; + uart_clk: uart-clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; @@ -66,6 +67,12 @@ clock-div = <4>; clock-mult = <1>; }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; };
psci { @@ -98,6 +105,18 @@ #size-cells = <1>; ranges = <0x0 0x0 0xff800000 0x800000>;
+ hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm63146-hsspi", "brcm,bcmbca-hsspi-v1.0"; + reg = <0x1000 0x600>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/dts/bcm63158.dtsi b/arch/arm/dts/bcm63158.dtsi index 4bed1f914a9b..ffb824fe600d 100644 --- a/arch/arm/dts/bcm63158.dtsi +++ b/arch/arm/dts/bcm63158.dtsi @@ -82,11 +82,9 @@ };
hsspi_pll: hsspi-pll { - compatible = "fixed-factor-clock"; + compatible = "fixed-clock"; #clock-cells = <0>; - clocks = <&periph_clk>; - clock-mult = <2>; - clock-div = <1>; + clock-frequency = <400000000>; };
uart_clk: uart-clk { @@ -249,16 +247,15 @@ status = "disabled"; };
- hsspi: spi-controller@1000 { - compatible = "brcm,bcm6328-hsspi"; + hsspi: spi@1000 { #address-cells = <1>; #size-cells = <0>; + compatible = "brcm,bcm63158-hsspi", "brcm,bcmbca-hsspi-v1.0"; reg = <0x1000 0x600>; - clocks = <&hsspi_pll>, <&hsspi_pll>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; clock-names = "hsspi", "pll"; - spi-max-frequency = <100000000>; num-cs = <8>; - status = "disabled"; };
diff --git a/arch/arm/dts/bcm6813.dtsi b/arch/arm/dts/bcm6813.dtsi index c3e6197be808..eaa5ee889f51 100644 --- a/arch/arm/dts/bcm6813.dtsi +++ b/arch/arm/dts/bcm6813.dtsi @@ -78,6 +78,7 @@ #clock-cells = <0>; clock-frequency = <200000000>; }; + uart_clk: uart-clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; @@ -85,6 +86,12 @@ clock-div = <4>; clock-mult = <1>; }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; };
psci { @@ -116,6 +123,19 @@ #size-cells = <1>; ranges = <0x0 0x0 0xff800000 0x800000>;
+ hsspi: spi@1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm6813-hsspi", "brcm,bcmbca-hsspi-v1.1"; + reg = <0x1000 0x600>, <0x2610 0x4>; + reg-names = "hsspi", "spim-ctrl"; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; + clock-names = "hsspi", "pll"; + num-cs = <8>; + status = "disabled"; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/dts/bcm6856.dtsi b/arch/arm/dts/bcm6856.dtsi index 38c88f8399bb..245a7d65cf1b 100644 --- a/arch/arm/dts/bcm6856.dtsi +++ b/arch/arm/dts/bcm6856.dtsi @@ -63,14 +63,6 @@ clock-frequency = <200000000>; };
- hsspi_pll: hsspi-pll { - compatible = "fixed-factor-clock"; - #clock-cells = <0>; - clocks = <&periph_clk>; - clock-mult = <2>; - clock-div = <1>; - }; - wdt_clk: wdt-clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; @@ -78,6 +70,12 @@ clock-div = <4>; clock-mult = <1>; }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <400000000>; + }; };
psci { @@ -224,16 +222,15 @@ status = "disabled"; };
- hsspi: spi-controller@1000 { - compatible = "brcm,bcm6328-hsspi"; + hsspi: spi@1000 { #address-cells = <1>; #size-cells = <0>; + compatible = "brcm,bcm6856-hsspi", "brcm,bcmbca-hsspi-v1.0"; reg = <0x1000 0x600>; - clocks = <&hsspi_pll>, <&hsspi_pll>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; clock-names = "hsspi", "pll"; - spi-max-frequency = <100000000>; num-cs = <8>; - status = "disabled"; };
diff --git a/arch/arm/dts/bcm6858.dtsi b/arch/arm/dts/bcm6858.dtsi index dc95047a2659..ba30f70f1a9b 100644 --- a/arch/arm/dts/bcm6858.dtsi +++ b/arch/arm/dts/bcm6858.dtsi @@ -82,14 +82,6 @@ clock-frequency = <200000000>; };
- hsspi_pll: hsspi-pll { - compatible = "fixed-factor-clock"; - #clock-cells = <0>; - clocks = <&periph_clk>; - clock-mult = <2>; - clock-div = <1>; - }; - wdt_clk: wdt-clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; @@ -97,6 +89,12 @@ clock-div = <4>; clock-mult = <1>; }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <400000000>; + }; };
psci { @@ -243,16 +241,15 @@ status = "disabled"; };
- hsspi: spi-controller@1000 { - compatible = "brcm,bcm6328-hsspi"; + hsspi: spi@1000 { #address-cells = <1>; #size-cells = <0>; + compatible = "brcm,bcm6858-hsspi", "brcm,bcmbca-hsspi-v1.0"; reg = <0x1000 0x600>; - clocks = <&hsspi_pll>, <&hsspi_pll>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&hsspi_pll &hsspi_pll>; clock-names = "hsspi", "pll"; - spi-max-frequency = <100000000>; num-cs = <8>; - status = "disabled"; };
diff --git a/arch/arm/dts/bcm94908.dts b/arch/arm/dts/bcm94908.dts index fcbd3c430ace..c4e6e71f6310 100644 --- a/arch/arm/dts/bcm94908.dts +++ b/arch/arm/dts/bcm94908.dts @@ -28,3 +28,7 @@ &uart0 { status = "okay"; }; + +&hsspi { + status = "okay"; +}; diff --git a/arch/arm/dts/bcm94912.dts b/arch/arm/dts/bcm94912.dts index a3623e6f6919..e69cd683211a 100644 --- a/arch/arm/dts/bcm94912.dts +++ b/arch/arm/dts/bcm94912.dts @@ -28,3 +28,7 @@ &uart0 { status = "okay"; }; + +&hsspi { + status = "okay"; +}; diff --git a/arch/arm/dts/bcm963146.dts b/arch/arm/dts/bcm963146.dts index e39f1e6d4774..db2c82d6dfd8 100644 --- a/arch/arm/dts/bcm963146.dts +++ b/arch/arm/dts/bcm963146.dts @@ -28,3 +28,7 @@ &uart0 { status = "okay"; }; + +&hsspi { + status = "okay"; +}; diff --git a/arch/arm/dts/bcm963158.dts b/arch/arm/dts/bcm963158.dts index eba07e0b1ca6..25c12bc63545 100644 --- a/arch/arm/dts/bcm963158.dts +++ b/arch/arm/dts/bcm963158.dts @@ -28,3 +28,7 @@ &uart0 { status = "okay"; }; + +&hsspi { + status = "okay"; +}; diff --git a/arch/arm/dts/bcm96813.dts b/arch/arm/dts/bcm96813.dts index af17091ae764..faba21f03120 100644 --- a/arch/arm/dts/bcm96813.dts +++ b/arch/arm/dts/bcm96813.dts @@ -28,3 +28,7 @@ &uart0 { status = "okay"; }; + +&hsspi { + status = "okay"; +}; diff --git a/arch/arm/dts/bcm96856.dts b/arch/arm/dts/bcm96856.dts index 032aeb75c983..9808331eede2 100644 --- a/arch/arm/dts/bcm96856.dts +++ b/arch/arm/dts/bcm96856.dts @@ -28,3 +28,7 @@ &uart0 { status = "okay"; }; + +&hsspi { + status = "okay"; +}; diff --git a/arch/arm/dts/bcm96858.dts b/arch/arm/dts/bcm96858.dts index 0cbf582f5d54..1f561c8e13b0 100644 --- a/arch/arm/dts/bcm96858.dts +++ b/arch/arm/dts/bcm96858.dts @@ -28,3 +28,7 @@ &uart0 { status = "okay"; }; + +&hsspi { + status = "okay"; +};