B4860, B4440, B4420 and B4220 have MAPLE, so enable law creation for them only Remove static LAW creation for MAPLE
Signed-off-by: Shaveta Leekha shaveta@freescale.com Signed-off-by: Sandeep Singh Sandeep@freescale.com Change-Id: I1d1d6e414617bb45ade5e5ab9134f0464763c034 Reviewed-on: http://git.am.freescale.net:8181/23351 Tested-by: Review Code-CDREVIEW CDREVIEW@freescale.com Reviewed-by: Poonam Aggrwal poonam.aggrwal@freescale.com Reviewed-by: Yusong Sun yorksun@freescale.com --- board/freescale/b4860qds/b4860qds.c | 8 ++++++++ board/freescale/b4860qds/law.c | 3 --- 2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/board/freescale/b4860qds/b4860qds.c b/board/freescale/b4860qds/b4860qds.c index 34d66d5..975952f 100644 --- a/board/freescale/b4860qds/b4860qds.c +++ b/board/freescale/b4860qds/b4860qds.c @@ -915,6 +915,14 @@ int board_early_init_r(void) const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; int flash_esel = find_tlb_idx((void *)flashbase, 1); int ret; + u32 svr = SVR_SOC_VER(get_svr()); + + /* Create law for MAPLE only for personalities having MAPLE */ + if ((svr == SVR_B4860) || (svr == SVR_B4440) || + (svr == SVR_B4420) || (svr == SVR_B4220)) { + set_next_law(CONFIG_SYS_MAPLE_MEM_PHYS, LAW_SIZE_16M, + LAW_TRGT_IF_MAPLE); + }
/* * Remap Boot flash + PROMJET region to caching-inhibited diff --git a/board/freescale/b4860qds/law.c b/board/freescale/b4860qds/law.c index 5b327cc..047c3cb 100644 --- a/board/freescale/b4860qds/law.c +++ b/board/freescale/b4860qds/law.c @@ -17,9 +17,6 @@ struct law_entry law_table[] = { SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN), #endif SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC), -#ifdef CONFIG_SYS_MAPLE_MEM_PHYS - SET_LAW(CONFIG_SYS_MAPLE_MEM_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_MAPLE), -#endif #ifdef CONFIG_SYS_DCSRBAR_PHYS /* Limit DCSR to 32M to access NPC Trace Buffer */ SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),