Thanks Stefan,
-----Original Message----- From: Stefan Roese [mailto:sr@denx.de] Sent: Thursday, June 18, 2015 5:02 AM To: Vikas MANOCHA Cc: u-boot@lists.denx.de; grmoore@opensource.altera.com; dinguyen@opensource.altera.com; jteki@openedev.com Subject: Re: [PATCH RESEND 0/7] spi: cadence_qspi: optimize & fix indirect rd-writes
Hi Vikas,
I finally got to testing your latest patchset. And have some comments / problems:
On 17.06.2015 04:14, Vikas Manocha wrote:
This patchset:
- removes sram polling while reading/writing from flash.
- fixes trigger base & transfer start address register programming.
This fix superseeds the previous patch "spi: cadence_qspi: Fix the indirect ahb trigger address setting"
- adds support to get fifo width from device tree
Vikas Manocha (7): spi: cadence_qspi: remove sram polling from flash read spi: cadence_qspi: read can be independent of fifo width spi: cadence_qspi: remove sram polling from flash write spi: cadence_qspi: move trigger base configuration in init spi: cadence_qspi: fix indirect read/write start address spi: cadence_qspi: fix base trigger address & transfer start address spi: cadence_qspi: get fifo width from device tree
arch/arm/dts/socfpga.dtsi | 2 + arch/arm/dts/stv0991.dts | 4 +- drivers/spi/cadence_qspi.c | 14 ++-- drivers/spi/cadence_qspi.h | 6 +- drivers/spi/cadence_qspi_apb.c | 140 ++++++++++---------------------------
5 files changed, 50 insertions(+), 116 deletions(-)
With these patches applied, I see this compilation error:
$ make -s -j10 Error: arch/arm/dts/socfpga.dtsi:637.5-6 syntax error FATAL ERROR: Unable to parse input tree Error: arch/arm/dts/socfpga.dtsi:637.5-6 syntax error FATAL ERROR: Unable to parse input tree make[2]: *** [arch/arm/dts/socfpga_arria5_socdk.dtb] Error 1 make[2]: *** Waiting for unfinished jobs.... make[2]: *** [arch/arm/dts/socfpga_cyclone5_socdk.dtb] Error 1 Error: arch/arm/dts/socfpga.dtsi:637.5-6 syntax error FATAL ERROR: Unable to parse input tree make[2]: *** [arch/arm/dts/socfpga_cyclone5_socrates.dtb] Error 1
The socfpga.dtsi has incorrect syntax. Here a quick fix for this - please add this to your next version. And please also compile-test for e.g. socrates.
You are right, semicolon has to be replaced with comma. I will fix it in next version & do the compile-test also.
$ gd diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi index a2a2029..448870e 100644 --- a/arch/arm/dts/socfpga.dtsi +++ b/arch/arm/dts/socfpga.dtsi @@ -633,8 +633,8 @@ #address-cells = <1>; #size-cells = <0>; reg = <0xff705000 0x1000>,
<0xffa00000 0x1000>;<0x00000000 0x0010>;
<0xffa00000 0x1000>,<0x00000000 0x0010>; interrupts = <0 151 4>; clocks = <&qspi_clk>; ext-decoder = <0>; /* external decoder */Okay. After installing the resulting image on the SoCrates, I get the following error while reading from SD-card:
=> sf probe SF: Detected N25Q256 with page size 256 Bytes, erase size 4 KiB, total 32 MiB SF: Warning - Only lower 16MiB accessible, Full access #define CONFIG_SPI_FLASH_BAR => sf read 100000 0 100000 QSPI: indirect completion status error with reg 0x0000000c SF: 1048576 bytes @ 0x0 Read: ERROR
So there seems to be something breaking the SoCFPGA Cadence QSPI support. Any idea whats going wrong here?
It means indirect read was not successful. Can you please:
- please check if "sf write" is also causing some error or is working fine. - git bisect or cherry-pick to find out which patch is breaking the read functionality.
Rgds, Vikas
Thanks, Stefan