Hi,
On 11 August 2014 09:23, Simon Glass sjg@chromium.org wrote:
This is an implementation of GPIOs for Tegra that uses driver model. It has been tested on trimslice and also using the new iotrace feature.
The implementation uses a top-level GPIO device (which has no actual GPIOS). Under this all the banks are created as separate GPIO devices.
The GPIOs are named as per the Tegra datasheet/header files: A0..A7, B0..B7, ..., Z0..Z7, AA0..AA7, etc.
Since driver model is not yet available before relocation, or in SPL, a special function is provided for seaboard's SPL code.
Signed-off-by: Simon Glass sjg@chromium.org
Any comments on this one please?
Changes in v6:
- Use base_gpio instead of base_port for simplicity
- Add an implementation of the get_function() method
Changes in v5: None Changes in v4:
- Rename struct device to struct udevice
Changes in v3:
- Move dm command enable to previous patch
- Use gpio number for the internal helper functions
Changes in v2:
- Split out driver model changes into separate patches
- Correct bugs found during testing
arch/arm/include/asm/arch-tegra/gpio.h | 15 +- board/nvidia/seaboard/seaboard.c | 2 +- drivers/gpio/tegra_gpio.c | 326 +++++++++++++++++++++++++++------ include/configs/tegra-common.h | 1 + 4 files changed, 282 insertions(+), 62 deletions(-)
Regards, Simon